ADN2812ACPZ

ANALOG DEVICES  ADN2812ACPZ  芯片, 时钟与数据恢复器, 2.7GHZ, LFCSP-32

Product Details

The ADN2812 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 12.3 Mb/s to 2.7 Gb/s. The ADN2812 automatically locks to all data rates without the need for an external reference clock or programming. All SONET jitter requirements are met, including jitter transfer, jitter generation, and jitter tolerance. All specifications are quoted for −40°C to +85°C ambient temperature, unless otherwise noted.

This device, together with a PIN diode and a TIA preamplifier, can implement a highly integrated, low cost, low power fiber optic receiver.

The receiver front end, loss of signal LOS detector circuit indicates when the input signal level has fallen below a user-adjustable threshold. The LOS detect circuit has hysteresis to prevent chatter at the output.

The ADN2812 is available in a compact 5 mm × 5 mm 32-lead lead frame chip scale package LFCSP.

**Applications**

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SONET OC-1/OC-3/OC-12/OC-48 and all associated FEC rates

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Fibre Channel, 2× Fibre Channel, GbE, HDTV

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WDM transponders

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Regenerators/repeaters

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Test equipment

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Broadband cross-connects and routers

### Features and Benefits

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Serial data input: 12.3 Mb/s to 2.7 Gb/s

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Exceeds SONET requirements for jitter transfer/ generation/tolerance

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Quantizer sensitivity: 6 mV typical

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Adjustable slice level: ±100 mV

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Patented clock recovery architecture

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Loss of signal LOS detect range: 3 mV to 15 mV

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Independent slice level adjust and LOS detector

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No reference clock required

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Loss of lock indicator

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I2C interface to access optional features

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Single-supply operation: 3.3 V

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Low power: 750 mW typical