CY7C1268KV18-550BZXC
36兆位的DDR II + SRAM 2字突发架构( 2.0周期读延迟) 36-Mbit DDR II+ SRAM 2-Word Burst Architecture 2.0 Cycle Read Latency
SRAM - Synchronous, DDR II+ Memory IC 36Mb 2M x 18 Parallel 550MHz 165-FBGA 13x15
立创商城:
CY7C1268KV18-550BZXC
得捷:
IC SRAM 36MBIT PARALLEL 165FBGA
贸泽:
SRAM 36MB 2Mx18 1.8v 550MHz DDR II SRAM
艾睿:
SRAM Chip Sync Single 1.8V 36M-Bit 2M x 18 0.45ns 165-Pin FBGA Tray
Chip1Stop:
SRAM Chip Sync Single 1.8V 36M-Bit 2M x 18 0.45ns 165-Pin FBGA Tray
DeviceMart:
IC SRAM 2MX18 1.8V SYNC 165-FBGA