CD74HC154EN

高速CMOS逻辑4至16线路解码器/多路解复用器 High-Speed CMOS Logic 4- to 16-Line Decoder/Demultiplexer

The is a 4-to-16 Line Decoder/Demultiplexer with two enable inputs, E1 and E2. A High on either enable input forces the output into the High state. The demultiplexing function is performed by using the four input lines, A0 to A3, to select the output lines Y0\ to Y15\ and using one enable as the data input while holding the other enable low.

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Two enable inputs to facilitate demultiplexing and cascading functions

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10 LSTTL loads standard outputs, 15 LSTTL loads bus driver outputs

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Balanced propagation delay and transition times

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Significant power reduction compared to LSTTL logic ICs

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NIL= 30%, NIH = 30% of VCC at VCC = 5V High noise immunity

ESD sensitive device, take proper precaution while handling the device.