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CD74HC42

高速 CMOS 逻辑 10 选 1 BCD 至十进制解码器

The ’HC42 and CD74HCT42 BCD-to-Decimal Decoders utilize silicon-gate CMOS technology to achieve operating speeds similar to LSTTL decoders with the low power consumption of standard CMOS integrated circuits. These devices have the capability of driving 10 LSTLL loads and are compatible with the standard LS logic family. One of ten outputs low on select is selected in accordance with the BCD input. Non-valid BCD inputs result in none of the outputs being selected all outputs are high.

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Buffered Inputs and Outputs
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Typical Propagation Delay: 12ns at VCC = 5V, CL = 15pF, TA = 25°C
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Fanout Over Temperature Range
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Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
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Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
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Wide Operating Temperature Range . . . -55°C to 125°C
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Balanced Propagation Delay and Transition Times
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Significant Power Reduction Compared to LSTTL Logic ICs
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HC Types
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2V to 6V Operation
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High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
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HCT Types
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4.5V to 5.5V Operation
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Direct LSTTL Input Logic Compatibility, VIL = 0.8V Max, VIH = 2V Min
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CMOS Input Compatibility, Il 1µA at VOL, VOH

CD74HC42 PDF数据文档
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