SN74ABT125N

具有三态输出翻两番总线缓冲器GATES QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS

The is a quadruple bus Buffer Gate features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable OE\ input is high. This device is fully specified for hot-insertion applications using IOFF and power-up 3-state. The IOFF circuitry disables the outputs, preventing damaging current backflow through the devices when it is powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pull-up resistor, the minimum value of the resistor is determined by the current-sinking capability of the driver.

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High-drive outputs

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IOFF and power-up 3-state support hot insertion

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Latch-up performance exceeds 500mA per JEDEC standard JESD-17

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<1V at VCC = 5V, TA = 25°C VOLP output ground bounce