GS8321Z36AGD-250

SRAM Chip Sync Quad 2.5V/3.3V 36M-Bit 1M x 36 5.5ns/2.5ns 165Pin FBGA

* User-configurable Pipeline and Flow Through mode * NBT No Bus Turn Around functionality allows zero wait read-write-read bus utilization * Fully pin-compatible with both pipelined and flow through ™, NoBL™ and ZBT™ SRAMs * IEEE 1149.1 JTAG-compatible Boundary Scan * 2.5 V, or 3.3 V +10%/–10% core power supply * LBO pin for Linear or Interleave Burst mode * Pin-compatible with 2Mb, 4Mb, 8Mb, and 18Mb devices * Byte write operation 9-bit Bytes * 3 chip enable signals for easy depth expansion * ZZ pin for automatic power-down * JEDEC-standard 165-bump BGA package * 2nd Generation, Green 13 mm x 15 mm, 165 FPBGA