25LC640-I/SN

MICROCHIP  25LC640-I/SN  EEPROM, AEC-Q100, 64 Kbit, 8K x 8位, 2 MHz, SPI, SOIC, 8 引脚

The is a 64Kbit serial Electrically Erasable Programmable Read-only Memory EEPROM. The memory is accessed via a simple serial peripheral interface SPI compatible serial bus. The bus signals required are a clock input SCK plus separate data in SI and data out SO lines. Access to the device is controlled through a chip select CS input. Communication to the device can be paused via the hold pin HOLD. While the device is paused, transitions on its inputs will be ignored, with the exception of chip select, allowing the host to service higher priority interrupts.

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Low-power CMOS technology

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32-byte Page

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5ms Maximum write cycle time

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Self-timed erase and write cycles

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Block write protection

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Built-in write protection

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Power on/off data protection circuitry

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Sequential read

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High reliability

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>200 Years data retention

ESD sensitive device, take proper precaution while handling the device.