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CY62167EV18LL-55BVI

16百万位元( 1M ×16 )静态RAM 16 Mbit 1M x 16 Static RAM

SRAM - Asynchronous Memory IC 16Mb 1M x 16 Parallel 55ns 48-VFBGA 6x8


立创商城:
CY62167EV18LL-55BVI


得捷:
NO WARRANTY


贸泽:
SRAM 16Mb 1.8V 55ns 1M x 16 LP SRAM


艾睿:
SRAM Chip Async Single 1.8V 16M-Bit 1M x 16 55ns 48-Pin VFBGA Tray


安富利:
The CY62167EV18 is a high performance CMOS static RAM organized as 1M words by 16 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery LifeTM MoBL® in portable applications such as cellular telephones. The device also has an automatic power down feature that reduces power consumption by 99 percent when addresses are not toggling. Place the device into standby mode when deselected. The input and output pins are placed in a high impedance state when: the device is deselected; outputs are disabled; both Byte High Enable and Byte Low Enable are disabled; and a write operation is in progress.To write to the device, take Chip Enables and Write Enable input LOW. If Byte Low Enable is LOW, then data from I/O pins is written into the location specified on the address pins. If Byte High Enable is LOW, then data from I/O pins is written into the location specified on the address pins A0 through A19.To read from the device, take Chip Enables and Output Enable LOW while forcing the Write Enable HIGH. If Byte Low Enable is LOW, then data from the memory location specified by the address pins appears on I/O0 to I/O7. If Byte High Enable is LOW, then data from memory appears on I/O8 to I/O15.


Chip1Stop:
SRAM Chip Async Single 1.8V 16M-Bit 1M x 16 55ns 48-Pin VFBGA Tray


Verical:
SRAM Chip Async Single 1.8V 16M-bit 1M x 16 55ns 48-Pin VFBGA Tray


DeviceMart:
IC SRAM 16MB 1.8V 55NS 48-VFBGA


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