ADSP-21060KBZ-160

SHARC处理器 SHARC Processor

High performance signal processor for communications, graphics and imaging applications

Super Harvard Architecture

4 independent buses for dual data fetch, instruction fetch, and nonintrusive I/O

32-bit IEEE floating-point computation units—multiplier, ALU, and shifter

Dual-ported on-chip SRAM and integrated I/O peripherals—a complete system-on-a-chip

得捷:
IC DSP CONTROLLER 32BIT 225-BGA

艾睿:
DSP Floating-Point 32bit 40MHz 40MIPS 225-Pin BGA Tray

Chip1Stop:
DSP Floating-Point 32-Bit 40MHz 40MIPS 225-Pin BGA