CD74HC597

具有输入存储的高速 CMOS 逻辑 8 位移位寄存器

The ’HC597 and CD74HCT597 are high-speed silicon gate CMOS devices that are pin compatible with the LSTTL 597 devices. Each device consists of an 8-flip-flop input register and an 8-bit parallel-in/serial-in, serial-out shift register. Each register is controlled by its own clock. A "low" on the parallel load input PL\\ shifts parallel stored data asynchronously into the shift register. A "low" master input MR\\ clears the shift register. Serial input data can also be synchronously shifted through the shift register when PL\ is high.

.

Buffered Inputs

.

Asynchronous Parallel Load

.

Fanout Over Temperature Range

.

Standard Outputs...10 LSTTL Loads

.

Bus Driver Outputs...15 LSTTL Loads

.

Wide Operating Temperature Range... –55°C to 125°C

.

Balanced Propagation Delay and Transition Times

.

Significant Power Reduction Compared to LSTTL Logic ICs

.

HC Types

.

2V to 6V Operation

.

High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V

.

HCT Types

.

4.5V to 5.5V Operation

.

Direct LSTTL Input Logic Compatibility, VIL = 0.8V Max, VIH = 2V Min

.

CMOS Input Compatibility, Il ≤ 1µA at VOL, VOH

Data sheet acquired from Harris Semiconductor