74GTLP1395DGVRE4
剖分LVTTL端口，反馈路径和可选极性的两个1位LVTTL至GTLP可调节边沿速率总线收发器 TWO 1-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE BUS TRANSCEIVERS WITH SPLIT LVTTL PORT, FEEDBACK PATH, AND SELECTABLE POLARITY
Mixed Signal Translator Bidirectional 2 Circuit 1 Channel 20-TVSOP
得捷:
IC TRANSLATOR BIDIR 20TVSOP
Chip1Stop:
Bus XCVR Single 2-CH 3-ST 20-Pin TVSOP T/R
