PCA9564PW

NXP  PCA9564PW  专用接口, I2C, 并行, SMBus, I2C总线与SMBus系统应用, 2.3 V, 3.6 V, TSSOP, 20 引脚

The is a parallel bus to I²C-bus Controller an integrated circuit designed in CMOS technology that serves as an interface between most standard parallel-bus microcontrollers/microprocessors and the serial I²C-bus and allows the parallel bus system to communicate bi-directionally with the I²C-bus. The PCA9564 can operate as a master or a slave and can be a transmitter or receiver. Communication with the I²C-bus is carried out on a byte-wise basis using interrupt or polled handshake. The PCA9564 controls all the I²C-bus specific sequences, protocol, arbitration and timing with no external timing element required. It has been designed to be very similar to the Philips standard 80C51 microcontroller I²C hardware so the device is not code compatible. Additionally, the PCA9564 does not support the bus monitor "Snoop" mode nor the long distance mode and is not footprint compatible with the PCF8584.

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Both master and slave functions

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Multi-master capability

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Internal oscillator reduces external components

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Latch-up testing is done to JEDEC standard JESD78 which exceeds 100mA