ISO721DG4

TEXAS INSTRUMENTS  ISO721DG4  数字隔离器, 1通道, 24 ns, 3 V, 5.5 V, SOIC, 8 引脚

The is a single 100Mbps Digital Isolator with a logic input and output buffer separated by a silicon dioxide insulation barrier. This barrier provides galvanic isolation of up to 4000 VPK per VDE. Used in conjunction with isolated power supplies, this device prevents noise currents on a data bus or other circuits from entering the local ground and interfering with or damaging sensitive circuitry. A binary input signal is conditioned, translated to a balanced signal and then differentiated by the capacitive isolation barrier. Across the isolation barrier a differential comparator receives the logic transition information, then sets or resets a flip-flop and the output circuit accordingly. A periodic update pulse is sent across the barrier to ensure the proper dc level of the output. If this dc-refresh pulse is not received for more than 4µs, the input is assumed to be unpowered or not being actively driven and the failsafe circuit drive the output to a logic-high state.

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Low propagation delay

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Low pulse skew

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Low-power sleep mode

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High electromagnetic immunity

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Low input-current requirement

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Failsafe output

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50kV/µs Typical transient immunity

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Green product and no Sb/Br

This device has limited built-in ESD protection, leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.