SN74LVTH240

具有三态输出的 3.3V ABT 八路缓冲器/驱动器

These octal buffers and line drivers are designed specifically for low-voltage 3.3-V VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

These devices are organized as two 4-bit buffer/line drivers with separate output-enable OE\ inputs. When OE\ is low, the devices pass data from the A inputs to the Y outputs. When OE\ is high, the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended.

These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.

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Support Mixed-Mode Signal Operation 5-V Input and Output Voltages With 3.3-V VCC

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Support Unregulated Battery Operation Down to 2.7 V

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Typical VOLP Output Ground Bounce

   <0.8 V at VCC = 3.3 V, TA = 25°C

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Ioff and Power-Up 3-State Support Hot Insertion

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Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors

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Latch-Up Performance Exceeds 500 mA Per JESD 17

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ESD Protection Exceeds JESD 22

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2000-V Human-Body Model A114-A

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200-V Machine Model A115-A