AD7190

4.8千赫兹超低噪声24位Σ- Δ型ADC PGA 4.8 kHz Ultra-Low Noise 24-Bit Sigma-Delta ADC with PGA

GENERAL DESCRIPTION

The is a low noise, complete analog front end for high precision measurement applications. It contains a low noise, 24-bit sigma-delta ∑-Δ analog to digital converter ADC. The on-chip low noise gain stage means that signals of small amplitude can be interfaced directly to the ADC.

FEATURES

RMS noise: 8.5 nV @ 4.7 Hz gain = 128

16 noise free bits @ 2.4 kHz gain = 128

Up to 22.5 noise free bits gain = 1

Offset drift: 5 nV/°C

Gain drift: 1 ppm/°C

Specified drift over time

2 differential/4 pseudo differential input channels

Automatic channel sequencer

Programmable gain 1 to 128

Output data rate: 4.7 Hz to 4.8 kHz

Internal or external clock

Simultaneous 50 Hz/60 Hz rejection

4 general-purpose digital outputs

Power supply

   AVDD: 4.75 V to 5.25 V

   DVDD: 2.7 V to 5.25 V

Current: 6 mA

Temperature range: –40°C to +105°C

Interface

   3-wire serial

   SPI, QSPI™, MICROWIRE™, and DSP compatible

   Schmitt trigger on SCLK

APPLICATIONS

Weigh scales

Strain gauge transducers

Pressure measurement

Temperature measurement