MC74AC273

八路D触发器 Octal D Flip−Flop

The /74ACT273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock CP and Master Reset MR inputs load and reset clear all flip-flops simultaneously. The register is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip- flop"s Q output. All outputs will be forced LOW independently of Clock or Data inputs by a LOW voltage level on the MR input. The device is useful for applications where the true output only is required and the Clock and Master Reset are common to all storage elements.

Features

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Ideal Buffer for MOS Microprocessor or Memory

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Eight Edge-Triggered D Flip-Flops

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Buffered Common Clock

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Buffered, Asynchronous Master Reset

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See MC74AC377 for Clock Enable Version

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See MC74AC373 for Transparent Latch Version

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See MC74AC374 for 3-State Version

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Outputs Source/Sink 24 mA

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ACT273 Has TTL Compatible Inputs

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Pb-Free Packages are Available