LMK00725PW

TEXAS INSTRUMENTS  LMK00725PW  芯片, 扇出缓冲器, 650MHZ, TSSOP-20

The is a high-performance clock Fan-out Buffer can distributes up to five 3.3V LVPECL outputs from one of two inputs, which can accept differential or single-ended inputs. The clock enable input is synchronized internally to eliminate runt or glitch pulses on the outputs when the clock enable pin is asserted or de-asserted. The low additive jitter and phase noise floor and ensured output and part-to-part skew characteristics make the LMK00725 ideal for applications demanding high performance and repeatability.

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Two differential input pairs

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Synchronous clock enable

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43fs RMS typical at 312.5MHz additive jitter

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35ps Maximum output skew

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100ps Maximum part-to-part skew

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Green product and no Sb/Br