TPS3123J18DBVT

TEXAS INSTRUMENTS  TPS3123J18DBVT  电源监视器, 1.62V, 手动复位, 低电平有效复位, 0.85V-3.3V输入, SOT-23-5

The is an ultralow voltage processor Supervisory Circuit with active-low push-pull output. The supervisory circuit provides circuit initialization and timing supervision, primarily for DSP and processor-based systems. During power-on, /RESET is asserted when the supply voltage VDD becomes higher than 0.75V. Thereafter, the supply voltage supervisor monitors VDD and keeps /RESET output active as long as VDD remains below the threshold voltage VIT. An internal timer delays the return of the output to the inactive state high to ensure proper system reset. The delay time, td=180ms, starts after VDD has risen above the threshold voltage VIT. When the supply voltage drops below the threshold voltage VIT, the output becomes active low again. No external components are required. It has a fixed-sense threshold voltage VIT set by a high precision internal voltage divider.

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Manual reset input

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Watchdog timer retriggers the /RESET output at VDD >= VIT

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power-ON reset generator with fixed delay time of 180ms

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14µA Typical supply current

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Green product and no Sb/Br