SN74ABT543A

具有三态输出的八路寄存收发器

The "ABT543A octal transceivers contain two sets of D-type latches for temporary storage of data flowing in either direction. Separate latch-enable LEAB\ or LEBA\\ and output-enable OEAB\ or OEBA\\ inputs are provided for each register to permit independent control in either direction of data flow.

The A-to-B enable CEAB\\ input must be low to enter data from A or to output data from B. If CEAB\ is low and LEAB\ is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB\ puts the A latches in the storage mode. With CEAB\ and OEAB\ both low, the 3-state B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar, but requires using the CEBA\, LEBA\, and OEBA\ inputs.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54ABT543A is characterized for operation over the full military temperature range of -55°C to 125°C. The is characterized for operation from -40°C to 85°C.

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State-of-the-Art **_EPIC-_**II **_B_**TM BiCMOS Design Significantly Reduces Power Dissipation

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ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model C = 200 pF, R = 0

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Typical V**OLP** Output Ground Bounce < 1 V at V**CC** = 5 V, T**A** = 25°C

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High-Drive Outputs -32-mA I**OH**, 64-mA I**OL**

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Package Options Include Plastic Small-Outline DW, Shrink Small-Outline DB, and Thin Shrink Small-Outline PW Packages, Ceramic Chip Carriers FK, Ceramic Flat W Package, and Plastic NT and Ceramic JT DIPs

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