ENC624J600-I/PT
MICROCHIP ENC624J600-I/PT 以太网控制器, 10 Mbps, IEEE 802.3, 3 V, 3.6 V, TQFP, 64 引脚
The is a stand-alone 10/100 Base-T Ethernet Interface Controller with integrated MAC and PHY, hardware cryptographic security engines and factory pre-programmed unique MAC address. A 24kB on-chip RAM buffer is for TX and RX operations. The ENC624J600 have an industry standard serial peripheral interface SPI or a flexible parallel interface. It is designed to serve as an Ethernet network interface for any microcontroller equipped with SPI or a standard parallel port. The ENC624J600 devices meet all of the IEEE 802.3 specifications applicable to 10Base-T and 100Base-TX Ethernet, including many optional clauses, such as auto-negotiation. It incorporates a number of packet filtering schemes to limit incoming packets.
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- IEEE 802.3™ compliant fast Ethernet controller
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- Integrated MAC and 10/100Base-T PHY
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- Hardware security acceleration engines
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- 24kB transmit/receive packet buffer SRAM
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- Supports one 10/100Base-T port with automatic
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- Polarity detection and correction
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- Supports auto-negotiation
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- Support for pause control frames, including automatic transmit and receive flow control
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- Supports half and full-duplex operation
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- Programmable automatic re-transmit on collision
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- Programmable padding and CRC generation
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- Programmable automatic rejection of erroneous and runt packets
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- Factory pre-programmed unique MAC address
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- MAC support for uni-cast, multicast and broadcast packet
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- Physical layer - wave shaping output filter
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- Security engines - Software AES CTR mode capability
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- Buffer - configurable transmit/receive buffer size
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- Operational - Transmit and receive interrupts
ESD sensitive device, take proper precaution while handling the device.
