UJA1131HW/FD/5V/4Y
专业电源管理 PMIC Buck/boost HS-CAN/dual LIN system basis chip
Overview
The UJA113x System Basis Chip SBC contains a fully integrated buck and boost converter along with a number of features commonly found in the latest generation of automotive Electronic Control Units ECUs. It interfaces directly with CAN and LIN bus lines, supplies the microcontroller, handles input and output signals and supports fail-safe features including a watchdog and advanced ‘limp home’ functionality configurable via non-volatile memory.
To satisfy the demand for SBCs that operate at low battery supply voltages and feature low power dissipation, a switched mode power supply SMPS with automatic down Buck mode or up conversion Boost mode has been integrated into the UJA113x. In Boost mode, the SMPS of the UJA1131 and UJA1132 variants can continue supplying a microcontroller during dips in the battery voltage, ensuring uninterrupted operation. The boost stage of the UJA1135 and the UJA1136 has limited output current capability, and is suitable for supplying the memory in a microcontroller to prevent information being lost. The SMPS requires only a single external coil and some capacitors but no separate semiconductors.
The UJA113x implements the classic CAN physical layer as defined in the current ISO11898 standard -2:2003, -5:2007, -6:2013. Pending the release of the upcoming version of ISO11898-2:201x including CAN FD, additional timing parameters defining loop delay symmetry are included. This implementation enables reliable communication in the CAN FD fast phase at data rates up to 2 Mbit/s.
The UJA113xFD/x variants support ISO 11898-6:2013 and ISO 11898-2:201x compliant CAN partial networking with a selective wake-up function incorporating CAN FD-passive. CAN FD-passive is a feature that allows CAN FD bus traffic to be ignored in Sleep/Standby mode. CAN FD-passive partial networking is the perfect fit for networks that support both CAN FD and classic CAN communications. It allows normal CAN controllers that do not need to communicate CAN FD messages to remain in partial networking Sleep/Standby mode during CAN FD communication without generating bus errors.
A number of configuration settings are stored in non-volatile memory. This makes it possible to adapt the power-on and limp home behavior of the UJA113x to meet the specific requirements of an application.
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## Features
### General
* Generic SBC functions:
* Fully integrated buck-boost converter
* 5 V/3.3 V voltage regulator delivering up to 500 mA
* Separate voltage regulator with optional protection against shorts to battery and loss of module ground
* CAN transceiver and up to two LIN transceivers
* Two-channel battery monitoring with integrated A/D converter
* Watchdog with Window and Timeout modes and on-chip oscillator
* Serial Peripheral Interface SPI for communicating with the microcontroller
* ECU power management system
* Protected general-purpose high-voltage I/O pins configurable as high-side drivers HS, low-side drivers LS or wake-up inputs
* Four internal PWM/pulse timers in derivatives containing high-voltage I/O pins
* Designed for automotive applications:
* Excellent ElectroMagnetic Compatibility EMC performance
* ±6 kV ElectroStatic Discharge ESD protection according to the Human Body Model HBM on the CAN/LIN bus pins
* ±6 kV ElectroStatic Discharge protection according to IEC 61000-4-2 on the CAN/LIN bus pins, the sensor supply output VEXT and the HVIO pins
* ±40 V short-circuit proof CAN/LIN bus pins
* Battery and CAN/LIN bus pins are protected against transients in accordance with ISO 7637-3
* Very low-current Standby and Sleep modes with full wake-up capability
* Supports remote flash programming via the CAN-bus
* Compact 10 mm × 10 mm HTQFP48 package with low thermal resistance
* Dark green product halogen free and Restriction of Hazardous Substances RoHS compliant
### Integrated buck and boost converter SMPS
* Buck and boost functions with a single external coil:
* Automatic Buck or Boost mode selection depending on input voltage and output load conditions
* Boost function allows the UJA1131 and UJA1132 to operate at very low supply voltages e.g. 2 V; lowest achievable supply voltage depends on output load conditions
* Boost function of the UJA1135 and UJA1136 can be used to supply the volatile memory of a microcontroller down to battery voltages a low as 2 V
* Soft-start function
* The SMPS functions as a pre-regulator for V1 and, optionally, V2:
* Results in excellent load response at V1 and V2
* Results in negligible ripple at V1 and V2 outputs
* Pre-regulator output voltage selectable via the SPI
* The SMPS can be switched to Pass-through mode to ensure the lowest possible current consumption with immediate full output current capability
* The SMPS can be used to supply external loads directly:
* e.g. as an energy-efficient supply for an LED chain
### Low-drop voltage regulators LDOs
* Main voltage regulator V1:
* 5 V or 3.3 V nominal output voltage depending on the selected device
* 500 mA output current capability
* capable of 500 mA transient load current jump in Standby mode
* Current limiting above 500 mA
* On-resistance of less than 2 Ω
* ±2 % accuracy
* Undervoltage reset; selectable threshold on the 5 V version: 60 %, 70 %, 80 % or 90 % of nominal value default detection and release at 90 %
* Excellent transient response with a small ceramic output capacitor
* Short-circuit protection
* Integrated clamp protects the microcontroller by maintaining the output voltage below 6 V, even when reverse currents of up to 50 mA are injected
* Turned off in Sleep mode
* Auxiliary voltage regulator V2 with configurable output stage:
* 5 V nominal output voltage
* ±2 % accuracy ±1.5 % up to 5 mA output current
* Current limiting above 100 mA
* Configurable as supply for on-board loads
* Configurable as supply for off-board loads ‘sensor supply’; protected against shorts to GND and battery; loss-of-ground proof; high ESD robustness
### CAN transceiver
* ISO 11898-2:201x upcoming merged ISO 11898-2/5/6 compliant 1 Mbit/s high-speed CAN transceiver supporting CAN FD active communication up to 2 Mbit/s in the CAN FD data field
* Autonomous bus biasing according to ISO 11898-6:2013
* CAN-bus connections are truly floating when power to pin BAT is off
* UJA113xFD: selective wake-up function ISO11989-6:2013 compliant CAN partial networking
* No ‘false’ wake-ups due to CAN FD traffic
* Separate supply pin for flexibility e.g. can be supplied from V1 or V2
### LIN transceivers
* One or two channels depending on the selected device
* LIN 2.x compliant
* Compliant with SAE J2602
* Downward compatible with LIN 1.3
* Integrated LIN slave termination
* Improved EMC emission performance with optimized curve shaping
### High-voltage I/Os HVIOs; not available in UJA113xFD/0 variants
* 4 or 8 general-purpose input/output pins individually configurable as high- or low-side output drivers
* On/off control via the SPI or by mapping to one of four internal PWM timers
* Optional direct output on/off control via another HVIO configured as an input HVIO1 to HVIO4 controlled by HVIO5 to HVIO8 in variants with 8 HVIO pins
* PWM timing options include 8-bit dimming up to 250 Hz as well as periodic pulses with variable length and variable repetition rate; e.g. for cyclic contact monitoring
* On-resistance less than 24 Ω
* Two or more HVIOs can be combined to form a single output with increased driver capability
* Combined into one or two banks of four HVIOs with individual supply pins for each bank; the bankscan be supplied independently from the battery ≈12 V, the SMPS ≈6 V or V1/V2 5 V
* Reverse-current protection of the output in Off mode loss-of-ground and loss-of-battery proof
* Open-load diagnostics and short-circuit protection and diagnostics
* Can be configured individually to shut down in response to a battery supply undervoltage and/or overvoltage
* Individually configurable as inputs with wake-up capability
* Selectable wake-up edge
* Selectable wake-up threshold: ratiometric to HVIO supply pin or absolute level
* Wake-up threshold tolerates ground offsets of up to 2.5 V
* Wake-up source reporting via SPI
* Continuous or periodic input level sampling; timing can be synchronized with another HVIO pin configured as an output driver for cyclic contact monitoring
* Three HVIOs can be configured individually as limp-home outputs
* HVIO2 as static high-side driver limp-home signal
* HVIO3 as 100 Hz, 10 % duty cycle limp-home signal
* HVIO4 as 1.25 Hz, 50 % duty cycle limp-home signal
### A/D converter for monitoring the battery voltage
* 10-bit resolution, accurate to ±300 mV at 20 V full scale
* Two channels:
* Measures the voltage level on pin BAT or pin BATSENSE
* Measures the battery voltage on either side of a polarity protection diode connected to pin BATSENSE via a series resistor
* Continuous measurement on both channels
* Optional software interrupt and/or shutdown of functions when measured supply voltage is outside a defined range undervoltage and overvoltage detection
### Power management
* Wake-up via CAN, LIN or HVIO pins with wake-up source recognition
* HVIO wake input functionality can be disabled to reduce current consumption
* Cyclic output signal for biasing various wake-up applications with selectable period and configurable on-time
* Cyclic wake-up with selectable period
* Standby mode featuring very low supply current with V1 active to maintain supply to the microcontroller
* Sleep mode featuring very low supply current with V1 off
* Sleep mode option can be disabled via non-volatile memory
### System control and diagnostic features
* Watchdog that can operate in Window, Timeout with optional cyclic wake-up and Off Modes with automatic re-enable if an interrupt is generated
* Watchdog period selectable between 8 ms and 4 s
* 16-, 24- or 32-bit SPI for configuration, control and diagnosis
* 2 Interrupt output pins - one for high- and low-priority interrupts, one for high-priority interrupts; interrupts can be enabled individually:
* V1 and V2/VEXT undervoltage; V2/VEXT overvoltage; battery over- and undervoltage; CAN, LIN and local wake-up HVIO; CAN and HVIO diagnostics; overtemperature warning; cyclic wake-up; SPI failure
* Bidirectional reset pin with selectable reset length to support various microcontrollers; triggered, for example, by a watchdog overflow or by a V1 undervoltage event
* Limp-home output LIMP for activating application-specific ‘limp-home’ hardware in the event of a serious system malfunction
* Configuration information for selected functions stored in non-volatile memory
* Enable output EN for controlling safety-critical hardware; e.g. shut-down if the microcontroller fails
* Overtemperature warning and shut-down
## Features
* Overtemperature warning and shut-down
