GS8662Q18BGD-200

QDR SRAM, 4MX18, 0.45ns, CMOS, PBGA165, 15 X 13MM, 1MM PITCH, ROHS COMPLIANT, FPBGA-165

* Simultaneous Read and Write Sigma Quad™ Interface * JEDEC-standard pinout and package * Dual Double Data Rate interface * Byte Write controls sampled at data-in time * Burst of 2 Read and Write * 1.8 V +100/–100 mV core power supply * 1.5 V or 1.8 V HSTL Interface * Pipelined read operation * Fully coherent read and write pipelines * ZQ pin for programmable output drive strength * IEEE 1149.1 JTAG-compliant Boundary Scan * Pin-compatible with present 144 Mb devices * 165-bump, 13 mm x 15 mm, 1 mm bump pitch BGA package * RoHS-compliant 165-bump BGA package available * 200 MHz, 3rd Generation, Green 13 mm x 15 mm, 165 FPBGA