IS42S16128-8T

128K words x 16Bits x 2 banks4Mbitsynchronous graphics RAM

DESCRIPTION

ISSI"s 4Mb Synchronous DRAM IS42S16128 is organized as a 131072-word x 16-bit x 2-bank for improved performance. The synchronous DRAMs achieve high-speed data transfer using pipeline architecture. All inputs and outputs signals refer to the rising edge of the clock input.

FEATURES

• Clock frequency: 125 MHz, 100 MHz, 83 MHz

• Two banks can be operated simultaneously and independently

• Single 3.3V power supply

• LVTTL interface

• Programmable burst length – 1, 2, 4, 8, full page

• Programmable burst sequence: Sequential/Interleave

• Auto refresh, self refresh

• 1K refresh cycles every 16 ms

• Random column address every clock cycle

• Programmable CAS latency 2, 3 clocks

• Burst read/write and burst read/single write operations capability

• Byte controlled by LDQM and UDQM

• Package 400-mil 50-pin TSOP II