TMP86FS49BFG

芯片

CMOS 8-Bit Microcontroller

The is a single-chip 8-bit high-speed and high-functionality microcomputer incorporating 61440

bytes of Flash Memory. It is pin-compatible withthe TMP86CH49FG/CM49FG/CS49FG Mask ROM version.

The TMP86FS49BFG can realize operations equivalent to those of the TMP86CH49FG/CM49FG/CS49FG by pro

gramming the on-chip Flash Memory.

Features

1\. 8-bit single chip microcomputer TLCS-870/C series

\- Instruction execution time :

  0.25 µs at 16 MHz

  122 µs at 32.768 kHz

\- 132 types & 731 basic instructions

2\. 24interrupt sources External : 5 Internal : 19

3\. Input / Output ports 56 pins

   Large current output: 13pins Typ. 20mA, LED direct drive

4\. Watchdog Timer

5\. Prescaler

\- Time base timer

\- Divider output function

6\. 16-bit timer counter: 1 ch

\- Timer, External trigger, Window, Pulse width measurement, Event counter, Programmable pulse generate PPG modes

7\. 16-bit timer counter: 1 ch

\- Timer, Event counter, Window modes

8\. 8-bit timer counter : 4 ch

\- Timer, Event counter, Programmable divider output PDO, Pulse width modulation PWM output, Programmable pulse generation PPG modes

9\. 8-bit UART : 2 ch

10\. High-Speed SIO: 2ch

11\. Serial Bus InterfaceI2C Bus: 1ch

12\. 10-bit successive approximation type AD converter

\- Analog input: 16 ch

13\. Key-on wakeup : 4 ch

14\. Clock operation

   Single clock mode

   Dual clock mode

15\. Low power consumption operation

STOP mode: Oscillation stops.Battery/Capacitor back-up.

SLOW1 mode: Low power consumption operation using low-frequency clock.High-frequency clock

stop.

SLOW2 mode: Low power consumption operation using low-frequency clock.High-frequency clock

oscillate.

IDLE0 mode: CPU stops, and only the Time-Based-TimerTBT on peripherals operate using high frequency clock. Release by falling edge of the source clock which is set by TBTCR.

IDLE1 mode: CPU stops and peripherals operate using high frequency clock. Release by interruputsCPU restarts.

IDLE2 mode: CPU stops and peripherals operate using high and low frequency clock. Release by interruputs. CPU restarts.

SLEEP0 mode: CPU stops, and only the Time-Based-TimerTBT on peripherals operate using low frequency clock.Release by falling edge of the source clock which is set by TBTCR.

SLEEP1 mode: CPU stops, and peripherals operate using low frequency clock. Release by interruput.CPU restarts.

SLEEP2 mode: CPU stops and peripherals operate using high and low frequency clock. Release by interruput.

16\. Wide operation voltage:

    4.5V to 5.5V at 16MHz /32.768 kHz

    2.7V to 5.5V at 8MHz /32.768 kHz