74LVT16373ADGG,112

NXP  74LVT16373ADGG,112  芯片, 锁存器, D型, 透明, 三态, TSSOP-48

The 74LVT16373ADGG is a 16-bit BiCMOS transparent D Latch designed with non-inverting 3-state bus compatible outputs for VCC operation at 3.3V. The device can be used as two 8-bit latches or one 16-bit latch. When enable E input is high, the Q outputs follow the data D inputs. When enable is taken low, the Q outputs are latched at the levels of the D inputs one setup time prior to the high-to-low transition.

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TTL Input and output switching levels

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Input and output interface capability to systems at 5V supply

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Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs

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Live insertion/extraction permitted

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Power-up reset

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Power-up 3-State

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No bus current loading when output is tied to 5V bus

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Latch-up protection exceeds 500mA per JEDEC Std 17