EP4CE115 FPGA Development Board 50MHz CPU 130Mb RAM 4KB/8Mb EEPROM/Flash
高速夹层连接器（HSMC） 接口 平台评估扩展板
得捷:
HSMC DEBUG LOOPBACK CONN
艾睿:
EP4CE115 FPGA Development Board 50MHz CPU 130MB RAM 4KB/8MB EEPROM/Flash
Verical:
HSMC Debug and Loopback Connector Package
| 图片 | 型号 | 厂商 | 下载 |
|---|---|---|---|
 | P0057 | Terasic Technologies | |
 | P0052 | Terasic Technologies | |
 | P0053 | Terasic Technologies | |
 | P005-010 | LITE | |
 | P0059 | Terasic Technologies | |
 | P005-010-14RA | Tripp-Lite | |
 | P005-12N | Tripp-Lite | |
 | P005-006-YW | Tripp-Lite | |
 | P005-006-14LA | Tripp-Lite | |
 | P005-002-14LA | Tripp-Lite | |
 | P005-006-14RA | Tripp-Lite |
