S912XEP100BMAG

NXP  S912XEP100BMAG  微控制器, 16位, AEC-Q100, MC9S12XE, 50 MHz, 1 MB, 64 KB, 144 引脚, LQFP

The is a 16-bit Microcontroller based on enhanced HCS12X CPU with CISC architecture operates at a maximum frequency of 50MHz. The device incorporates 1000kB internal flash, 64kB internal RAM, 4kB EEPROM, 12-channel 24-bit A/D converter and 119 general-purpose I/O pins. This device also features peripherals like two inter-integrated circuit IIC bus module, one CAN 2.0 A, B software compatible module, eight serial communications interface SCI and three serial peripheral interface modules SPI.

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Upward compatible with MC9S12 instruction set

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Enhanced indexed addressing

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Access to large data segments independent of PPAGE

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Interrupt module INT

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Module mapping control MMC

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Debug module

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Background debug mode BDM

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Memory protection unit MPU

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Low power loop control pierce oscillator utilizing a 4MHz to 16MHz crystal

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Internally filtered, frequency modulated phase-locked-loop clock generation IPLL

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Clock and reset generation CRG

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COP watchdog

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Real time interrupt

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Clock monitor

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Fast wake up from STOP in self clock mode

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Enhanced capture timer ECT - 8 x 16-bit channels for input capture or output compare

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Standard timer module TIM - 8 x 16-bit channels for input capture or output compare

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Periodic interrupt timer PIT

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8 PWM pulse-width modulator channels

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On-chip voltage regulator - two parallel, linear voltage regulators with bandgap reference