STM8S001J3M3TR

STM8 16MHz 闪存：8K@x8bit RAM：1KB

The STM8S001J3 8-bit microcontrollers offer 8 Kbytes of Flash program memory, plus integrated true data EEPROM. It is referred to as low-density device in the STM8S microcontroller family reference manual RM0016.

The STM8S001J3 device provides the following benefits: performance, robustness and reduced system cost.

Device performance and robustness are ensured by true data EEPROM supporting up to 100000 write/erase cycles, advanced core and peripherals made in a state-of-the-art technology at 16 MHz clock frequency, robust I/Os, independent watchdogs with separate clock source, and a clock security system.

The system cost is reduced thanks to a high system integration level with internal clock oscillators, watchdog, and brown-out reset.

Full documentation is offered as well as a wide choice of development tools.

**Key Features**

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Core

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16 MHz advanced STM8 core with Harvard architecture and 3-stage pipeline

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Extended instruction set

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Memories

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Program memory: 8 Kbytes Flash memory; data retention 20 years at 55 °C after 100 cycles

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RAM: 1 Kbyte

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Data memory: 128-byte true data EEPROM; endurance up to 100 k write/erase cycles

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Clock, reset and supply management

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2.95 V to 5.5 V operating voltage

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Flexible clock control, 3 master clock sources

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External clock input

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Internal, user-trimmable 16 MHz RC

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Internal low-power 128 kHz RC

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Clock security system with clock monitor

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Power management

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Low-power modes wait, active-halt, halt

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Switch-off peripheral clocks individually

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Permanently active, low-consumption power-on and power-down reset

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Interrupt management

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Nested interrupt controller with 32 interrupts

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Up to 5 external interrupts

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Timers

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Advanced control timer: 16-bit, 2 CAPCOM channels, 2 outputs, dead-time insertion and flexible synchronization

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16-bit general purpose timer, with 3 CAPCOM channels IC, OC or PWM

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8-bit basic timer with 8-bit prescaler

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Auto wakeup timer

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Window and independent watchdog timers

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Communications interfaces

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UART, SmartCard, IrDA, LIN master mode

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SPI unidirectional interface up to 8 Mbit/s master simplex mode, slave receiver only

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I2C interface up to 400 Kbit/s

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Analog to digital converter ADC

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10-bit ADC, ± 1 LSB ADC with up to 3 multiplexed channels, scan mode and analog watchdog

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I/Os

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Up to 5 I/Os including 4 high-sink outputs

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Highly robust I/O design, immune against current injection

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Development support

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Embedded single-wire interface module SWIM or fast on-chip programming and non-intrusive debugging