MM74HCT245WM

FAIRCHILD SEMICONDUCTOR  MM74HCT245WM  总线收发器, 8门, 1输入, 4.5V至5.5V, SOIC-20

The is an octal 3-state bidirectional Buffer Transceiver utilizes advanced silicon-gate CMOS technology and is intended for two-way asynchronous communication between data buses. It has high drive current outputs which enable high speed operation even when driving large bus capacitances. This circuit possesses the low power consumption of CMOS circuitry, yet has speeds comparable to low power Schottky TTL circuits. This device is TTL input compatible and can drive up to 15 LS-TTL loads and all inputs are protected from damage due to static discharge by diodes to VCC and ground. It has one active low enable input and direction control. When the DIR input is HIGH, data flows from the A inputs to the B outputs. When DIR is LOW data flows from B to A. This device is intended to interface between TTL and NMOS components and standard CMOS devices. This part is also plug-in replacements for LS-TTL devices and can be used to reduce power consumption in existing designs.

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3-state Outputs for connection to system buses

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High speed - 16ns typical propagation delay

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Low power - 14ns