ADC12D1800

12 位、单路 3.6 GSPS 超高速 ADC

The 12-bit, 3.6 GSPS is the latest advance in ’s Ultra-High-Speed ADC family and builds upon the features, architecture and functionality of the 10-bit GHz family of ADCs.

The ADC12D1800 provides a flexible LVDS interface which has multiple SPI programmable options to facilitate board design and FPGA/ASIC data capture. The LVDS outputs are compatible with IEEE 1596.3-1996 and supports programmable common mode voltage.

The product is packaged in a leaded or lead-free 292-ball thermally enhanced BGA package over the rated industrial temperature range of –40°C to +85°C.

**To achieve full rated performance for fCLK > 1.6 GHz, write the maximum power settings one time to Register 6h through the serial interface; see for more information.**

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Configurable to Either 3.6 GSPS Interleaved or 1.8

GSPS Dual ADC

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Pin-Compatible with ADC10D1000/1500 and

ADC12D1000/1600

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Internally Terminated, Buffered, Differential Analog

Inputs

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Interleaved Timing Automatic and Manual Skew

Adjust

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Test Patterns at Output for System Debug

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Programmable 15-bit Gain and 12-bit Plus Sign

Offset

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Programmable tAD Adjust Feature

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1:1 Non-Demuxed or 1:2 Demuxed LVDS Outputs

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AutoSync Feature for Multi-Chip Systems

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Single 1.9-V ± 0.1-V Power Supply

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Key Specifications

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Resolution: 12 Bits

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Interleaved 3.6 GSPS ADC

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Noise Floor Density –153.5 dBm/Hz typ

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IMD3 –61 dBFS typ

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Noise Power Ratio 48.5 dB typ

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Power 4.4 W typ

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Full Power Bandwidth 1.75 GHz typ

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Dual 1.8 GSPS ADC, Fin = 125MHz

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ENOB: 9.4 typ

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SNR 58.5 dB typ

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SFDR 73 dBc typ

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Power 4.4 W typ

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Full Power Bandwidth 2.8 GHz typ