TVP7001
具有模拟 PLL 的三路 8/10 位 165/110MSPS 视频和图形数字转换器
is a complete solution for digitizing video and graphic signals in RGB or YPbPr color spaces. The device supports pixel rates up to 165 MHz. Therefore, it can be used for PC graphics digitizing up to the VESA standard of UXGA 1600 × 1200 resolution at 60 Hz screen refresh rate, and in video environments for the digitizing of digital TV formats, including HDTV up to 1080p. TVP7001 can be used to digitize CVBS and Svideo signal with 10bit ADCs.
The TVP7001 is powered from 3.3V and 1.8V supply and integrates a triple highperformance A/D converter with clamping functions and variable gain, independently programmable for each channel. The clamping timing window is provided by an external pulse or can be generated internally. The TVP7001 includes analog slicing circuitry on the Y or G input to support synconluminance or syncongreen extraction. In addition, TVP7001 can extract discrete HSYNC and VSYNC from composite sync using a sync slicer.
TVP7001 also contains a complete analog PLL block to generate a pixel clock from the HSYNC input. Pixel clock output frequencies range from 12 MHz to 165 MHz.
All programming of the part is done via an industrystandard I2C interface, which supports both reading and writing of register settings. The TVP7001 is available in a spacesaving TQFP 100pin PowerPAD package.
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- Analog Channels
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- 6 dB to 6 dB Analog Gain
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- Analog Input MUXs
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- Auto Video Clamp
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- Three Digitizing Channels, Each With Independently Controllable Clamp, PGA, and ADC
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- Clamping: Selectable Clamping Between Bottom Level and Midlevel
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- Offset: 1024Step Programmable RGB or YPbPr Offset Control
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- PGA: 8Bit Programmable Gain Amplifier
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- ADC: 8/10Bit 165/110 MSPS A/D Converter
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- Automatic Level Control Circuit
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- Composite Sync: Integrated SynconGreen Extraction From GreenLuminance Channel
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- Support for DC and ACCoupled Input Signals
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- PLL
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- Fully Integrated Analog PLL for Pixel Clock Generation
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- 12165 MHz Pixel Clock Generation From HSYNC Input
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- Adjustable PLL Loop Bandwidth for Minimum Jitter
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- 5Bit Programmable Subpixel Accurate Positioning of Sampling Phase
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- Output Formatter
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- Support for RGB/YCbCr 4:4:4 and YCbCr 4:2:2 Output Modes to Reduce Board Traces
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- Dedicated DATACLK Output for Easy Latching of Output Data
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- System
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- IndustryStandard Normal/Fast I2C Interface With Register Readback Capability
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- SpaceSaving TQFP100 Pin Package
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- ThermallyEnhanced PowerPAD Package for Better Heat Dissipation
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- APPLICA ONS
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- LCD TV/Monitors/Projectors
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- DLP TV/Projectors
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- PDP TV/Monitors
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- PCTV SetTop Boxes
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- Digital Image Processing
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- Video Capture/Video Editing
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- Scan Rate/Image Resolution Converters
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- Video Conferencing
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- Video/Graphics Digitizing Equipment