TMP86C829BUG

8位微控制器 -MCU TLCS870/C M/ROM 8KROM 256 Ram

Features

1\. 8-bit single chip microcomputer TLCS-870/C series

   - Instruction execution time :

      0.25 µs at 16 MHz

      122 µs at 32.768 kHz

   - 132 types & 731 basic instructions

2\. 19interrupt sources External : 5 Internal : 14

3\. Input / Output ports 39 pins

   Large current output: 4pins Typ. 20mA, LED direct drive

4\. Watchdog Timer

5\. Prescaler

   - Time base timer

   - Divider output function

6\. 18-bit Timer/Counter : 1ch

   - Timer Mode

   - Event Counter Mode

   - Pulse Width Measurement Mode

   - Frequency Measurement Mode

7\. 8-bit timer counter : 4 ch

   - Timer, Event counter, Programmable divider output PDO, Pulse width modulation PWM output, Programmable pulse generation PPG modes

8\. 8-bit UART/SIO : 1 ch

9\. 10-bit successive approximation type AD converter

   - Analog input: 8 ch

10\. Key-on wakeup : 4 ch

11\. LCD driver/controller

   Built-in voltage booster for LCD driver With display memory

   LCD direct drive capability MAX 32 seg × 4 com

   1/4,1/3,1/2duties or static drive are programmably selectable

12\. Clock operation

   Single clock mode

   Dual clock mode

13\. Low power consumption operation

   STOP mode: Oscillation stops. Battery/Capacitor back-up.

   SLOW1 mode: Low power consumption operation using low-frequency clock.High-frequency clock stop.

   SLOW2 mode: Low power consumption operation using low-frequency clock.High-frequency clock oscillate.

   IDLE0 mode: CPU stops, and only the Time-Based-TimerTBT on peripherals operate using high frequency clock. Release by falling edge of the source clock which is set by TBTCR.

   IDLE1 mode: CPU stops and peripherals operate using high frequency clock. Release by interru putsCPU restarts.

   IDLE2 mode: CPU stops and peripherals operate using high and low frequency clock. Release by inter ruputs. CPU restarts.

   SLEEP0 mode: CPU stops, and only the Time-Based-TimerTBT on peripherals operate using low frequency clock.Release by falling edge of the source clock which is set by TBTCR.

   SLEEP1 mode: CPU stops, and peripherals operate using low frequency clock. Release by interru put.CPU restarts.

   SLEEP2 mode: CPU stops and peripherals operate using high and low frequency clock. Release by interruput.

14\. Wide operation voltage:

   4.5 V to 5.5 V at 16MHz /32.768 kHz

   2.7 V to 5.5 V at 8 MHz /32.768 kHz

   1.8 V to 5.5 V at 4.2MHz /32.768 kHz