AM4379BZDNA100
Sitara 处理器：Arm Cortex-A9、PRU-ICSS、EtherCAT、3D 图形 491-NFBGA -40 to 105
The AM437x high-performance processors are based on the ARM Cortex-A9 core.
The processors are enhanced with 3D graphics acceleration for rich graphical user interfaces, as well as a coprocessor for deterministic, real-time processing including industrial communication protocols, such as EtherCAT, PROFIBUS, EnDat, and others. The devices support high-level operating systems HLOS. Linux® is available free of charge from TI. Other HLOSs are available from TIs Design Network and ecosystem partners.
These devices offer an upgrade to systems based on lower performance ARM cores and provide updated peripherals, including memory options such as QSPI-NOR and LPDDR2.
The processors contain the subsystems shown in Figure 1-1, and a brief description of each follows.
The processor subsystem is based on the ARM Cortex-A9 core, and the PowerVR SGX™ graphics accelerator subsystem provides 3D graphics acceleration to support display and advanced user interfaces.
The programmable real-time unit subsystem and industrial communication subsystem PRU-ICSS is separate from the ARM core and allows independent operation and clocking for greater efficiency and flexibility. The PRU-ICSS enables additional peripheral interfaces and real-time protocols such as EtherCAT, PROFINET, EtherNet/IP, PROFIBUS, Ethernet Powerlink, Sercos, EnDat, and others. The PRU-ICSS enables EnDat and another industrial communication protocol in parallel. Additionally, the programmable nature of the PRU-ICSS, along with their access to pins, events and all system-on-chip SoC resources, provides flexibility in implementing fast real-time responses, specialized data handling operations, custom peripheral interfaces, and in off-loading tasks from the other processor cores of the SoC.
High-performance interconnects provide high-bandwidth data transfers for multiple initiators to the internal and external memory controllers and to on-chip peripherals. The device also offers a comprehensive clock-management scheme.
One on-chip analog to digital converter ADC0 can couple with the display subsystem to provide an integrated touch-screen solution. The other ADC ADC1 can combine with the pulse width module to create a closed-loop motor control solution.
The RTC provides a clock reference on a separate power domain. The clock reference enables a battery-backed clock reference.
The camera interface offers configuration for a single- or dual-camera parallel port.
Cryptographic acceleration is available in every AM437x device. Secure boot is available only on AM437xHS devices for anticloning and illegal software update protection. For more information about secure boot and HS devices, contact your TI sales representative.
