5962-9155501M3A

八路总线收发器和寄存器具有三态输出 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

description/ordering information

These devices consist of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock CLKAB or CLKBA input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the ’BCT646 devices.

State-of-the-Art BiCMOS Design Significantly Reduces ICCZ

Bus Transceivers/Registers

Independent Registers and Enables for A and B Buses

Multiplexed Real-Time and Stored Data

ESD Protection Exceeds JESD 22

  − 2000-V Human-Body Model A114-A

  − 200-V Machine Model A115-A