TC58DVM92A1FT00

SLC NAND Flash Parallel 3V/3.3V 512Mbit 64M x 8Bit 35ns 48Pin TSOP-I

DESCRIPTION

The device is a single 3.3 V 1-Gbit 553,648,128 bit NAND Electrically Erasable and Programmable Read-Only

Memory NAND E2PROM organized as 528 bytes u32 pages u4096 blocks. The device has a 528-byte static register which allows program and read data to be transferred between the register and the memory cell array in 528-byte increments. The Erase operation is implemented in a single block unit 16 Kbytes 512 bytes: 528 bytes u32 pages. 

x Organization

   Memory cell allay  528 u128K u8

   Register 528 u8

   Page size  528 bytes

   Block size  16K 512 bytes

x Modes

   Read, Reset, Auto Page Program,

   Auto Block Erase, Status Read, 

   Multi Block Program, Multi Block Erase

x Mode control

   Serial input/output

   Command control

x Power supply  VCC 2.7 V to 3.6 V

x Program/Erase Cycles  1E5 cycle with ECC

x Access time

   Cell array to register 25 Ps max

   Serial Read Cycle  50 ns min

x Operating current

   Read 50 ns cycle  10 mA typ.

   Program avg.  10 mA typ.

   Erase avg.  10 mA typ.

   Standby 50 PA max.

x Package

   TSOPI48-P-1220-0.50 Weight: 0.53g typ.