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MC14076B

4位D类寄存器具有三态输出 4-Bit D-Type Register with Three-State Outputs

The 4-Bit Register consists of four D-type flip-flops operating synchronously from a common clock. OR gated output-disable inputs force the outputs into a high-impedance state for use in bus organized systems. OR gated data-disable inputs cause the Q outputs to be fed back to the D inputs of the flip-flops. Thus they are inhibited from changing state while the clocking process remains undisturbed. An asynchronous master root is provided to clear all four flip-flops simultaneously independent of the clock or disable inputs.

Features

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Three-State Outputs with Gated Control Lines
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Fully Independent Clock Allows Unrestricted Operation for the Two Modes: Parallel Load and Do Nothing
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Asynchronous Master Reset
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Four Bus Buffer Registers
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Supply Voltage Range = 3.0 Vdc to 18 Vdc
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Capable of Driving Two Low-Power TTL Loads or One Low-Power Schottky TTL Load Over the Rated Temperature Range
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Pb-Free Packages are Available*

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