MC74HC174A

六路D触发器与普通时钟和复位 Hex D Flip-Flop with Common Clock and Reset

High-Performance Silicon-Gate CMOS The is identical in pinout to the LS174. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of six D flip-flops with common Clock and Reset inputs. Each flip-flop is loaded with a low-to-high transition of the Clock input. Reset is asynchronous and active-low.

Features

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Output Drive Capability: 10 LSTTL Loads

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Outputs Directly Interface to CMOS, NMOS, and TTL

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Operating Voltage Range: 2 to 6 V

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Low Input Current: 1.0 mA

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In Compliance with the Requirements Defined by JEDEC Standard No. 7A

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Chip Complexity: 162 FETs or 40.5 Equivalent Gates

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Pb-Free Packages are Available*