SN74AUP1G08

低功耗单路 2 输入正与门

This single 2-input positive-AND gate is designed for 0.8-V to 3.6-V VCC operation and performs the Boolean function Y = A • B or Y = A\ + B\ in positive logic.

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Available in the Ultra Small 0.64 mm2 Package

DPW With 0.5-mm Pitch

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Low Static-Power Consumption:

ICC = 0.9 µA Maximum

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Low Dynamic-Power Consumption:

Cpd = 4.3 pF Typical at 3.3 V

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Low Input Capacitance: Ci = 1.5 pF Typical

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Low Noise: Overshoot and Undershoot

<10% of VCC

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Ioff Supports Live Insertion, Partial-Power-Down

Mode, and Back Drive Protection

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Schmitt-Trigger Action Allows Slow Input

Transition and Better Switching Noise Immunity at

the Input Vhys = 250 mV Typical at 3.3 V

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Wide Operating VCC Range of 0.8 V to 3.6 V

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Optimized for 3.3-V Operation

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3.6-V I/O Tolerant to Support Mixed-Mode Signal

Operation

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tpd = 4.3 ns Maximum at 3.3 V

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Suitable for Point-to-Point Applications

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Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

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ESD Performance Tested Per JESD 22

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2000-V Human-Body Model

A114-B, Class II

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1000-V Charged-Device Model C101