嵌入式开发板硬件操作入门学习9——集成电路芯片手册术语词汇表（中英文对照）
时间：2023-01-11 11:00:00
原创链接：集成电路芯片半导体中英文对照术语词汇表
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| 英语 | 中文 |
1-9 |
|
| 10 gigabit | 10 Gb |
| 1st Nyquist zone | 第一个奈奎斯特区域 |
| 3D full?wave electromagnetic solver | 3D 全波电磁解算器 |
| 3-state | 三态 |
| 4th generation segmented routing | 第四代分层布线技术 |
| 5G commercialization | 5G 商用 |
| 7 series FPGA | 7 系列 FPGA |
A |
|
| Absolute Maximum Rating | 绝对最大额定值 |
| academic | 学术 |
| accelerated flow | 加速流程 |
| acceleration | 加速 |
| accelerator | 加速器 |
| accelerator card | 加速器卡 |
| acceptance filter | 验收过滤器 |
| Access lounge | 用户访问专区 |
| Accessible | 方便易用 |
| accumulator | 累加器 |
| activation | 激活 |
| active clock edge | 有效时钟沿 |
| active cooling | 主动散热 |
| Active Cooling | 主动散热 |
| active I/O termination | 有源 I/O 终端 |
| active interconnect | 有源互连 (Active Interconnect) |
| active partial reconfiguration | 重配置动态部分 |
| Active Power | 有功功耗 |
| Active State Power Manager (ASPM) | 活动状态功耗管理器 (ASPM) |
| active-High | 高电平有效 |
| active-Low | 低电平有效 |
| adaptable | 打造灵活 |
| Adaptable Computing Acceleration Platform | 加速平台的自适应计算 |
| adaptation time | 调整时间 |
| Adaptive Computing | 自适应计算 |
| adaptive delay | 自适应延迟 |
| adder | 加法器 |
| adder-chain | 加法链 |
| additional topics | 其它内容 |
| address | 地址 |
| address map | 地址映射 |
| Address Resolution Protocol (ARP) | 地址分析协议 (ARP) |
| Adjacent channel leakage ratio | 相邻信道泄漏比 |
| adoption option | 选购方案 |
| Advanced Driver Assistance System | 高级驾驶辅助系统 (ADAS) |
| Advanced Linux Sound Architecture (ALSA) | 先进的 Linux 音频架构 (ALSA) |
| Advanced Peripheral Bus (APB) | 高级外设总线 (APB) |
| advanced search | 高级搜索 |
| advanced silicon modular block | 高级硅片组合模块 |
| aerospace | 航空航天 |
| affinity | 亲和性 |
| 聚合 | |
| aggressor | 干扰源 |
| AI Engine | AI 引擎 |
| air flow|airflow | 气流 |
| alarm | 告警 |
| alert | 警报 |
| algorithm | 算法 |
| algorithmic design | 算法设计 |
| all static power | 全静态功耗 |
| alpha blending | α 混合 |
| Ambient Temperature | 环境温度 |
| American National Standards Institute | 美国国家标准学会 (ANSI) |
| amplitude | 振幅 |
| Analog supply current | 模拟供电电流 |
| Analog supply voltage | 模拟供电电压 |
| analog-to-digital converter | 模数转换器 |
| analysis | 分析 |
| analyze | 分析 |
| anatomy | 剖析 |
| annotation | 反标|注释 |
| Answer Record | 答复记录 |
| anti-aliasing | 抗混叠 |
| anti-imaging | 抗成像 |
| anti-pad | 反焊盘 |
| Anti-Resonance | 抗谐振 |
| Anti-Tamper|anti-tamper (AT) | 防篡改 (AT) |
| apertures | 间隙 |
| apparent sharpness | 图像视觉清晰度 |
| application | 应用 |
| application note | 应用指南 |
| Application processing Unit | 应用处理单元 |
| Application processing Unit (APU) | 应用处理单元 (APU) |
| apply | 应用 |
| arbiter | 仲裁器 |
| arbitrator | 仲裁器 |
| architecture | 架构 |
| archive | 存档 |
| area | 面积|区域|领域|逻辑资源 |
| area efficiency | 面积效率 |
| argument | 实参 |
| Arm Trusted Firmware (ATF)|Arm Trusted Firmware | Arm 可信固件 (ATF) |
| array | 阵列|数组 |
| artificial intelligence (AI) | 人工智能 (AI) |
| assembly | 装配 |
| assert | 有效|断言 |
| assert block | Assert 模块 |
| assign | 分配 |
| assignment | 赋值 |
| associative property | 结合律 |
| asymmetric multi-processing (AMP) | 非对称多核处理器 (AMP) |
| Asynchoronous Transfer Mode | 异步传输模式 (ATM) |
| asynchronous | 异步|异步的 |
| Atomic Operation|Atomic Op | 原子操作 |
| Attachment Unit Interface | 连接单元接口 |
| Attenuation | 衰减 |
| attribute | 属性 |
| audio | 音频 |
| augment | 增强 |
| aultiply-add/subtract | 乘累加/乘累减 |
| authentication | 验证 |
| Authentication Certificate | 身份验证证书 |
| auto electronics | 汽车电子 |
| automatic bus width detection | 自动总线宽度探测 |
| Automatic Test Equipment (ATE) | 自动测试设备 (ATM) |
| automotive | 汽车 |
| automotive temperature device | 汽车级温度范围器件 |
| auto-negotiation | 自动协商 |
| AUX power connector | AUX 电源连接器 |
| Avionics | 航空电子 |
| AXI coherency extension | AXI 一致性扩展 |
| AXI coherency extension (ACE) | AXI 一致性扩展 (ACE) |
B |
|
| Back Pressure | 反压 |
| backgrounder | 背景资料 |
| back-off algorithm | 退避算法 |
| backplane | 背板 |
| backtick | 反引号 |
| bad frame | 坏帧 |
| ball fine pitch BGA | 球栅精确栅距 (Ball Fine Pitch) BGA|Ball Fine Pitch BGA |
| ball fine pitch metal BGA - cavity down | 球栅精确栅距金属 (Ball Fine Pitch Metal) BGA - Cavity Down|Ball Fine Pitch Metal BGA - Cavity Down |
| ball fine pitch thin BGA | 球栅精确栅距薄型 (Ball Fine Pitch Thin) BGA|Ball Fine Pitch Thin BGA |
| ball grid array (BGA) | 球形栅格阵列 (BGA) |
| ball metal BGA - cavity down | 球栅金属 (Ball Metal) BGA - Cavity Down|Ball Metal BGA - Cavity Down |
| ball plastic BGA | 球栅塑料 (Ball Plastic) BGA|Ball Plastic BGA |
| Balun | 平衡转换器 |
| bandwidth | 带宽 |
| bank | bank |
| banking | bank 分配 |
| bare-metal|bare metal | 裸机 |
| base address | 基址 |
| base board | 基础板 |
| base logic partition | 基本逻辑分区 |
| Base System Builder Wizard | Base System Builder 向导 |
| baseband | 基带 |
| baseline | 基线 |
| batch operation | 批处理 |
| battery | 电池 |
| battery backup | 备份电池 |
| battery life estimate | 电池寿命估算 |
| battery-backed RAM | 电池供电式 RAM |
| baud rate | 波特率 |
| beaconing | 信标 |
| beamforming | 波束成形 |
| behavior simulation | 行为仿真 |
| behavioral level | 行为级 |
| Bell Labs Layered Space Time | 贝尔实验室分层空时 (BLAST) |
| Bellagio OpenMAX Integration Layer (OMX IL) | Bellagio OpenMAX 集成层 (OMX IL) |
| benchmark | 标准测试 (Benchmark)|标准测试 |
| BER | 误码率 |
| best design practice | 最佳设计实践 |
| Best Practice | 最佳实践 |
| bias | 偏差 |
| bidirectional|bi-directional | 双向 |
| bifurcation | 分叉 |
| big endian | 大字节序 |
| Big Endian | 大字节序 |
| bin | 二进制 |
| bit | 比特|位 |
| bit depth | 位深度 |
| bit error | 位（元）错误 |
| bit-error rate tester | 误码率测试器 |
| bit-reverse algorithm | 位反转算法 |
| bitstream | 比特流 |
| bitwise logical functionality | 按位逻辑功能 |
| black key | 黑密钥 |
| blade connectivity | 刀片连接功能 |
| blind via | 盲孔 |
| block | 块 |
| block automation | 块自动化设置 |
| block diagram | 原理图|模块框图 |
| block memory | 块存储器 |
| block RAM | 块 RAM |
| blocking | 阻塞 |
| blocking event | 阻塞事件 |
| board | 电路板|开发板 |
| board schematic | 电路板原理图 |
| board support package | 板级支持包 |
| Boards and Kits | 开发板与套件 |
| bond line thickness | 粘合层厚度 |
| bookkeeping data | 簿记数据 |
| boolean | 布尔 |
| boot | 启动 |
| boot image | 启动镜像 |
| boot image | 启动镜像 |
| boot loader | 启动加载程序 |
| boot sequence | 启动顺序 |
| bootloader | 启动加载程序 |
| bottleneck | 瓶颈 |
| Boundary Scan Cell Diagram | 边界扫描单元原理图 |
| boundary-scan mode | 边界扫描模式 |
| boundary-scan|boundary scan | 边界扫描 |
| bounding box | 边界框 |
| bracket | 支架 |
| BRAM | 块 RAM|BRAM |
| branch | 分支 |
| breadth-first search | 广度优先搜索 |
| breakout | 分接 |
| breakpoint | 断点 |
| bring-up | 初始化 |
| broadband | 宽带 |
| broadband access | 宽带接入 |
| broadband fixed | 固定宽带 |
| broadcast | 广播 |
| broadcast address | 广播地址 |
| Broadcast Comm | 广播通信 |
| Broadcast Connectivity Kit | 广播连接功能套件 |
| brochure | 宣传册 |
| browse | 浏览 |
| browser | 浏览器 |
| bubble sort | 冒泡排序 |
| buffer | n. 缓冲器|v. 缓冲 |
| buffer | 缓冲区 |
| buffered crossbar switch | 缓冲式纵横交换机 |
| bug | 漏洞 |
| build | 构建 |
| building block | 构建模块 |
| built-in Error Checking and Correction (ECC) | 内置式纠错检 (ECC) 功能 |
| bundle | 捆绑 |
| burst | 突发 |
| burst size | 突发量 |
| bus | 总线 |
| Bus Functional Model | 总线功能模型 |
| bus functional model | 总线功能模型 |
| bus interface | 总线接口 |
| bus-width detection pattern | 总线宽度探测码形|总线宽度检测位 |
| Bypass | 旁路 |
| byte | 字节 |
| byte- and word-wide configurations | 单字节及多字节宽度配置 |
| Byte Memory Planner | 字节存储计划器 |
C |
|
| cable | 电缆 |
| cache | 高速缓存 |
| Cache Coherent Interconnect | 高速缓存一致性互连 |
| Cache Coherent Interconnect for Accelerators | 加速器缓存一致性互连 |
| cache flush | 缓存刷新 |
| cache hit | 缓存命中 |
| cage | 外壳 |
| calibration | 校准 |
| cancel | 取消 |
| capacitance | 电容 |
| capacitor | 电容器 |
| capture edge | 捕获沿 |
| carousel | 数据轮播 |
| carrier card | 载卡 |
| Carrier Class Ethernet Services | 电信级以太网业务 |
| carrier signal | 载波信号 |
| carry chain | 进位链 |
| carry logic | 进位逻辑 |
| carry propagation | 进位传递 |
| cascadable | 可级联的 |
| cascade | 级联 |
| cascade connection | 级联连接 |
| cascade-integrator-comb | 级联积分梳状 (CIC) |
| cell | 单元 |
| cell bloating | 单元膨胀 |
| cellular network | 蜂窝网络 |
| ceramic BGA | 陶瓷 (Ceramic) BGA|Ceramic BGA |
| ceramic Brazed CQFP | 陶瓷铜焊 (Ceramic Brazed) CQFP|Ceramic Brazed CQFP |
| ceramic DIP | 陶瓷 (Ceramic) DIP|Ceramic DIP |
| Ceramic Packaging and Pinout Specifications | 陶瓷封装和管脚规范 |
| ceramic PGA | 陶瓷 (Ceramic) PGA|Ceramic PGA |
| ceramic quad | 陶瓷方形 (Ceramic Quad)|Ceramic Quad |
| Ceramic Quad Flat Package (CQFP) | 陶瓷四侧引脚扁平封装 (CQFP) |
| certification | 认证 |
| Change Notification | 变更通知 |
| change without risk | 无风险设计修改 |
| channel | 通道|信道 |
| channel bonding | 通道绑定 |
| channel matrix inversion | 信道矩阵求逆 |
| channel reordering | 信道重新排序 |
| characteristic impedance | 特性阻抗 |
| characterization | 特性 |
| characterization data | 特性描述数据 |
| Characterization Kit | 特性描述套件 |
| Characterization Kit | 特性描述套件 |
| check box | 复选框 |
| checklist | 检查表 |
| checkpoint | 检查点 |
| checkpoint verification | 检查点验证 |
| checksum offloading | 卸载校验和|卸载校验和运算 |
| cheksum | 校验和 |
| Chinese (Simplified) | 简体中文 |
| chip | 芯片 |
| chroma keying | 色度键控 |
| cipher block chaining | 密码分组链接 |
| circuit | 电路 |
| Circuitry | 电路 |
| circular buffer | 圆形缓冲器 |
| clamp diode | 钳位二极管 |
| clamshell | 蛤壳 |
| click | 单击 |
| clock | 时钟 |
| clock buffer | 时钟缓存 |
| clock capable | 能够当作时钟信号 |
| clock crossing | 跨时钟 |
| clock cycle | 时钟周期 |
| clock domain | 时钟域 |
| clock domain crossing|clock-domain-crossing | 时钟域交汇 |
| clock edge | 时钟沿 |
| clock enable | 时钟使能 |
| clock frequency | 时钟频率 |
| clock gating | 时钟门控 |
| clock input divide | 时钟输入分频 |
| clock interaction | 时钟相关性 |
| Clock Management | 时钟管理|时钟控制 |
| Clock Management Tile | 时钟管理模块 |
| clock net | 时钟信号线 |
| clock net | 时钟信号线 |
| clock network | 时钟网络 |
| clock network | 时钟网络 |
| clock pessimism removal (CPR) | 时钟消极因素移除 (CPR) |
| clock phase | 时钟相位 |
| clock planning | 时钟规划 |
| clock polarity | 时钟极性 |
| clock rate | 时钟速率 |
| clock region | 时钟区域 |
| clock root | 时钟根 |
| clock sense | 时钟敏感 |
| Clock Spine | 时钟轴 |
| Clock throttling | 时钟降频 |
| clock topology | 时钟拓扑 |
| clock tree | 时钟树 |
| clocking | 时钟|时钟设置 |
| clock-phase shifting | 时钟相位偏移 |
| Cloud | 云 |
| CNN pruning | CNN 剪枝 |
| cockpit | 考核中心 |
| code | 代码|码|编码 |
| code parameter | 码参数 |
| code snippet | 代码片段 |
| code word|codeword | 代码字|码字 |
| co-debug | 协同调试 |
| codec | 编解码器 |
| coding | 编码 |
| coefficient | 系数 |
| coherency | 一致性 |
| Coherent Hub Interface | 一致性集线器接口 |
| coherent mesh network | 一致性网状网络 |
| collision-avoidance algorithm | 避撞算法 |
| color space | 色彩空间 |
| command | 命令 |
| command-line | 命令行 |
| comma-separated value | 逗号分隔值 |
| Commodity SPI | 商用 SPI |
| Common-mode rejection ratio | 共膜抑制比 |
| common-mode voltage | 共模电压 |
| communication | 通信 |
| communication link | 通信链路 |
| Community Relations | 社区关系 |
| commutative property | 交换律 |
| Company Fact Sheet | 公司情况说明 |
| comparator | 比较器 |
| compatibility | 兼容性 |
| compilation | 编译 |
| compile | 编译 |
| compile order list | 编译次序列表 |
| compiler | 编译器 |
| complementer | 补码器 |
| complex | 复数 |
| complex conjugate number | 共轭复数 |
| complex exponential | 复指数 |
| compliant | 标准 |
| component | 组件 |
| composable data center | 可组合式数据中心 |
| Composable Hardware | 硬件可组合式 |
| composite signal | 复合信号 |
| compression | 压缩 |
| computational storage | 计算存储 |
| computationally intensive | 计算密集型 |
| compute | 计算 |
| compute intensive | 计算密集型 |
| compute unit | 计算单元 |
| computer | 计算机 |
| computer peripheral | 计算机外设 |
| concatenate path | 连接通路 |
| concurrent assertion | 并发断言 |
| concurrent processing | 并发处理 |
| conduction-cooled | 传导式散热 |
| cone | 椎 |
| confidence | 可信度 |
| confidence level | 信心级别 |
| config | 配置 |
| configurable logic block | 可配置逻辑块 |
| configuration | 配置|设置 |
| Configuration Status Register (CSR) | 配置状态寄存器 (CSR) |
| configuration storage device | 配置存储器件 |
| configure | 配置|设置 |
| conformal LEC | 保形 LEC |
| congestion | 拥塞 |
| connection | 联通|连接 |
| connection automation | 自动连接 |
| connectivity | 连接 |
| Connectivity Card | 连接功能卡 |
| Connectivity Card | 连接功能卡 |
| Connectivity Kit | 连接功能套件 |
| Connectivity Kit | 连接功能套件 |
| connector | 连接器 |
| consideration | 考虑因素 |
| constant | 常量|常数 |
| constant | 恒定 |
| constraint | 约束 |
| constraint randomization | 约束随机化 |
| constraint set | 约束集 |
| Constraints Guide | 约束指南 |
| construct | 构建|结构 |
| constructor | 构造函数 |
| consumer | 消费类|消费者 |
| consumer function | 使用者函数 |
| container | 容器 |
| contention | 争用 |
| Contention | 争用 |
| context | 上下文 |
| control line | 控制线路 |
| controlled impedance | 受控阻抗 |
| controlled slew rate | 可控转换速率 |
| controller | 控制器 |
| convergent rounding | 收敛的（无偏）舍入 |
| conversion specifier | 转换说明符 |
| conversion-free | 免转换 |
| converter | 转换器 |
| conveyer belt | 输送带 |
| convolutional interleaver | 卷积交织 |
| co-processing | 协处理 |
| core | 核 |
| core inserter | 核插入器 |
| correct-by-construction | 自动建构校正 |
| correlator | 相关器 |
| co-simulation | 协同仿真 |
| cost function | 成本函数 |
| cost-optimized | 成本优化 |
| counter | 计数器 |
| Course Description | 课程介绍 |
| course schedule | 课程安排 |
| coverage | 覆盖率 |
| Create Import Peripheral | 创建和导入外设 (CIP) |
| criteria | 标准 |
| critical path | 关键路径 |
| cross probe|cross-probe | 交叉探测 |
| cross probing|cross-probing | 交叉探测 |
| cross triggering | 交叉触发 |
| crossbar | 交叉开关矩阵 |
| cross-compiled | 交叉编译 |
| crossing | 跨|交汇 |
| crosspoint | 交叉点 |
| crosspoint switch | 交叉点交换机 |
| Crosstalk | 串扰 |
| crystal oscillator | 晶体振荡器|晶振 |
| crystal resonator | 晶体谐振器 |
| current draw | 电流汲取 |
| Curriculum Path | 课程路径 |
| custom | 定制 |
| custom IP development | 定制 IP 开发 |
| customer | 客户 |
| customer case study | 客户案例研究 |
| Customer Notice | 客户通知 |
| customer notification | 客户通知 |
| customize | 自定义 |
| cycle | 周期|循环 |
| cyclic prefix insertion | 周期前缀插入 |
| Cyclic Redundancy Check | 循环冗余校验 |
D |
|
| data | 数据 |
| data beat | 数据节拍 |
| data bit location | 数据比特位置 |
| Data Cable | 数据线缆 |
| Data Cable | 数据线缆 |
| data center | 数据中心 |
| data center | 数据中心 |
| data communication | 数据通信 |
| data flow | 数据流 |
| data hungry | 需要大量数据的 |
| data line | 数据线 |
| data mask | 数据掩码 |
| data path|datapath | 数据路径 |
| data preamble | 数据前同步码 |
| data regeneration controller | 数据再生控制器 |
| data sheet | 数据手册 |
| data sheet|datasheet | 数据手册 |
| data starvation | 数据不足 |
| database | 数据库 |
| data-bus turnaround penalty | 数据总线转换损耗 |
| dataflow | 数据流 |
| datapath width | 数据路径宽度 |
| Daughter Card | 子卡 |
| Daughter Card | 子卡 |
| DC and AC Switching Characteristic | DC 和 AC 开关特性 |
| DC and Switching Characteristics | 直流及开关特性 |
| DC blocking capacitor | 隔直电容 |
| deassert|de-assert | 无效|解除有效 |
| deblocker | 去块效应 |
| deblocking filter | 去块滤波器 |
| debug | 调试 |
| Debug Card | 调试卡 |
| debug channel | 调试通道 |
| debug core | 调试核 |
| debugger | 调试器 |
| debugging | 调试 |
| decimal radix | 十进制基数 |
| decimating filter | 抽取滤波器 |
| decimation | 抽取 |
| decision feedback equalization | 判定反馈均衡 |
| decoder | 解码器 |
| decompose | 分解 |
| decomposition | 分解 |
| decoupling capacitor | 去耦电容 |
| decryption | 解密 |
| dedicated fallback reconfiguration logic | 专用的回读重配置逻辑 |
| deep | 深|深度 |
| Deep-learning Processing Unit (DPU) | 深度学习处理器 (DPU) |
| Defect Detection | 缺陷检测 |
| defense | 国防 |
| defense-grade | 军用级 |
| definition | 定义 |
| degrade | 劣化 |
| deinterleaver | 去交织器 |
| delay | 延迟 |
| delay interval | 延迟间隔 |
| Delay Locked Loop (DLL) | 延迟锁相环 (DLL) |
| delineation | 界定 |
| demanding signal-processing | 高强度信号处理 |
| demapper | 解映射器 |
| demo | 演示 |
| demoboard|demo board | 演示板 |
| demodulator | 解调器 |
| de-mosaic | 解拼 |
| density | 器件密度|容量 |
| dependency | 相依性 |
| dependency property | 相关属性 |
| deployment | 部署 |
| depth | 深|深度 |
| de-puncturing | 去穿孔 |
| derandomizer | 解随机函数发生器 |
| descrambler | 解扰器 |
| description | 描述|说明 |
| deserializer | 解串器 |
| design | 设计 |
| Design Advisory | 设计咨询 |
| design automation | 设计自动化 |
| design closure | 设计收敛 |
| design closure | 设计收敛 |
| design cycle | 设计周期 |
| design dynamic power | 设计动态功耗 |
| design entry | 设计输入 |
| design environment | 设计环境 |
| design flow | 设计流程 |
| design hierarchy | 设计层 |
| Design Hub | 设计中心 |
| Design Kit | 设计套件 |
| design margin | 设计余量 |
| design methodology | 设计方法 |
| Design Methodology Checklist | 设计方法检查表 |
| design preservation | 设计保存 |
| design process | 设计进程 |
| design reuse | 设计复用 |
| design rule check | 设计规则检查 |
| designer | 设计师 |
| Designer Assistance | 设计辅助 |
| Designer Assistent | 设计辅助 |
| designer automation | 设计自动化 |
| destructor | 析构函数 |
| deterministic data | 确定性数据 |
| developer | 开发者 |
| development | 开发 |
| development board|Development Board | 开发板 |
| development cycle | 开发周期 |
| development environment | 开发环境 |
| Development Kit | 开发套件 |
| development package | 开发包 |
| device | 器件 |
| device configuration | 器件配置 |
| device cost | 器件成本 |
| device family | 器件系列 |
| device manager | 器件管理器 |
| device packaging | 器件封装 |
| device power down | 器件省电模式 |
| device tree | 设备树 |
| device tree blobs | 设备树二进制对象 (dtb) |
| diagonal cell | 对角线单元 |
| diagonal interconnect | 对角互连 |
| dialog box | 对话框 |
| die | 裸片 |
| die size | 裸片尺寸 |
| die-attach | 裸片粘结 |
| Dielectric | 电介质|介电 |
| Dielectric Loss | 介电损耗 |
| dielectric material | 电介质材质 |
| die-to-die | 裸片之间的 |
| die-to-die bandwidth | 裸片之间的带宽 |
| differential clock | 差分时钟 |
| Differential nonlinearity | 差分非线性 |
| differential pair | 差分（信号）对 |
| Differential Power Analysis (DPA) attack | 差分功耗分析 (DPA) 攻击 |
| differential swing control | 差分摆幅控制 |
| Digital Clock Manager | 数字时钟管理器 |
| Digital down converter | 数字下变频器 |
| digital downconverter | 数字下变频器 |
| Digital Pre-Distortion (DPD) | 数字预失真 (DPD) |
| digital radio system | 数字无线电系统 |
| Digital Rights Management (DRM) | 数字版权管理 (DRM) |
| Digital Signal Processing (DSP) | DSP|Digital Signal Processing (DSP)|数字信号处理 (DSP) |
| Digital Step | 数字步进 |
| Digital supply voltage | 数字供电电压 |
| digital TV | 数字电视 |
| digital up converter | 数字上变频器 |
| Digital Video Technology (DVT) | 数字视频技术 (DVT) |
| digitally controlled impedance | 数控阻抗 |
| direct form FIR filter | 直接型 FIR 滤波器 |
| Direct Memory Access (DMA) | 直接存储器访问 (DMA) |
| direct RF platform | 直接 RF 采样平台 |
| directive | 指令|指示 |
| directory | 目录 |
| disable | 禁用 |
| discrete | 离散 |
| Discrete Jitter | 离散抖动 |
| dissipation factor | 损耗因子 |
| dissolve | 消隐 |
| distortion | 失真 |
| distributed LUT RAM option | 分布式 LUT RAM 选项 |
| distributed RAM | 分布式 RAM |
| distribution | 分布 |
| distributor | 分销商|分布器 |
| divided clock | 分频时钟 |