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74ACT11373DW

74ACT11373DW

TI(德州仪器) 主动器件

TEXAS INSTRUMENTS  74ACT11373DW  逻辑芯片, 八路D型锁存器, 24SOIC

The is an Octal Transparent D-type Latch with 3-state outputs. It is designed specifically for driving highly-capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers and working registers. The eight latches of the 74ACT11373 are transparent D-type latches. While the LE input is high, the Q outputs follow the data D inputs. When the enable is taken low, the Q outputs are latched at the levels that were set up at the D inputs. A buffered OE\ input can be used to place the eight outputs in either a normal logic state high or low logic levels or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impendence third state and increased drive provide the capability to drive the bus lines in a bus-organized system without need for interface or pull-up components.

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3-state Bus driving true outputs
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Full parallel access for loading
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Buffered input and OE pins
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Inputs are TTL-voltage compatible
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Flow-through architecture optimizes PCB layout
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Center-pin VCC and GND configurations minimize high-speed switching noise
.
Green product and no Sb/Br
74ACT11373DW中文资料参数规格
技术参数

频率 1.00 MHz

电源电压DC 4.50V ~ 5.50V

输出接口数 8

输出电流 24 mA

电路数 8

针脚数 24

位数 8

传送延迟时间 11.8 ns

极性 Non-Inverting

电压波节 5.00 V

输出电流驱动 -1.00 mA

输入数 8

工作温度Max 85 ℃

工作温度Min -40 ℃

电源电压 4.5V ~ 5.5V

电源电压Max 5.5 V

电源电压Min 4.5 V

封装参数

安装方式 Surface Mount

引脚数 24

封装 SOIC-24

外形尺寸

高度 2.35 mm

封装 SOIC-24

物理参数

工作温度 -40℃ ~ 85℃

其他

产品生命周期 Active

包装方式 Tube

符合标准

RoHS标准 RoHS Compliant

含铅标准 Lead Free

REACH SVHC标准 No SVHC

REACH SVHC版本 2015/06/15

海关信息

ECCN代码 EAR99

74ACT11373DW引脚图与封装图
74ACT11373DW引脚图

74ACT11373DW引脚图

74ACT11373DW封装图

74ACT11373DW封装图

74ACT11373DW封装焊盘图

74ACT11373DW封装焊盘图

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