UJA1065TW/5V0/512

CAN 接口集成电路 UJA1065TW/HTSSOP32//5V0/C/T/TUBE DP

Overview

The UJA1065 fail-safe System Basis Chip SBC replaces basic discrete components that are common in every Electronic Control Unit ECU with a Controller Area Network CAN and a Local Interconnect Network LIN interface. The fail-safe SBC supports all networking applications that control various power and sensor peripherals by using high-speed CAN as the main network interface and LIN as a local sub-bus. The fail-safe SBC contains the following integrated devices:

* High-speed CAN transceiver, interoperable and downward compatible with CAN transceivers TJA1041 and TJA1041A, and compatible with the ISO 11898-2 standard and the ISO 11898-5 standard in preparation

* LIN transceiver compliant with LIN 2.0 and SAE J2602, and compatible with LIN 1.3

* Advanced independent watchdog

* Dedicated voltage regulators for microcontroller and CAN transceiver

* Serial peripheral interface full duplex

* Local wake-up input port

* Inhibit/limp-home output port

In addition to the advantages of integrating these common ECU functions in a single package, the fail-safe SBC offers an intelligent combination of system-specific functions such as:

* Advanced low-power concept

* Safe and controlled system start-up behavior

* Advanced fail-safe system behavior that prevents any conceivable deadlock

* Detailed status reporting on system and subsystem levels

The UJA1065 is designed to be used in combination with a microcontroller that incorporates a CAN controller. The fail-safe SBC ensures that the microcontroller is always started up in a defined manner. In failure situations, the fail-safe SBC will maintain microcontroller functionality for as long as possible to provide full monitoring and a software-driven fall-back operation.

The UJA1065 is designed for 14 V single power supply architectures and for 14 V and 42 V dual power supply architectures.

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## Features

**2.1 General**

* Contains a full set of CAN and LIN ECU functions:

* CAN transceiver and LIN transceiver

* Voltage regulator for the microcontroller 3.3 V or 5.0 V

* Separate voltage regulator for the CAN transceiver 5 V

* Enhanced window watchdog with on-chip oscillator

* Serial Peripheral Interface SPI for the microcontroller

* ECU power management system

* Fully integrated autonomous fail-safe system

* Designed for automotive applications:

* Supports 14 V and 42 V architectures

* Excellent ElectroMagnetic Compatibility EMC performance

* ±8 kV ElectroStatic Discharge ESD protection Human Body Model HBM for off-board pins

* ±4 kV ElectroStatic Discharge ESD protection IEC 61000-4-2 for off-board pins

* ±60 V short-circuit proof CAN/LIN-bus pins

* Battery and CAN/LIN-bus pins are protected against transients in accordance with ISO 7637-3

* Very low sleep current

* Supports remote flash programming via the CAN-bus

* Small 6.1 mm × 11 mm HTSSOP32 package with low thermal resistance

**2.2 CAN transceiver**

* ISO 11898-2 and ISO 11898-5 compliant high-speed CAN transceiver

* Enhanced error signalling and reporting

* Dedicated low dropout voltage regulator for the CAN-bus:

* Independent from microcontroller supply

* Guarded by CAN-bus failure management

* Significantly improves EMC performance

* Partial networking option with global wake-up feature, allows selective CAN-bus communication without waking up sleeping nodes

* Bus connections are truly floating when power is off

* SPLIT output pin for stabilizing the recessive bus level

**2.3 LIN transceiver**

* LIN 2.0 compliant LIN transceiver

* Downward compatible with LIN 1.3 and the TJA1020

**2.4 Power management**

* Smart operating modes and power management modes

* Cyclic wake-up capability in Standby and Sleep mode

* Local wake-up input with cyclic supply feature

* Remote wake-up capability via the CAN-bus and LIN-bus

* External voltage regulators can easily be incorporated in the power supply system flexible and fail-safe

* 42 V battery-related high-side switch for driving external loads such as relays and wake-up switches

* Intelligent maskable interrupt output

**2.5 Fail-safe features**

* Safe and predictable behavior under all conditions

* Programmable fail-safe coded window and time-out watchdog with on-chip oscillator, guaranteeing autonomous fail-safe system supervision

* Fail-safe coded 16-bit SPI interface for the microcontroller

* Global enable pin for the control of safety-critical hardware

* Detection and detailed reporting of failures:

* On-chip oscillator failure and watchdog alerts

* Battery and voltage regulator undervoltages

* CAN and LIN-bus failures short-circuits and open-circuit bus wires

* TXD and RXD clamping situations and short-circuits

* Clamped or open reset line

* SPI message errors

* Overtemperature warning

* ECU ground shift two selectable thresholds

* Rigorous error handling based on diagnostics

* Supply failure early warning allows critical data to be stored

* 23 bits of access-protected RAM is available e.g. for logging of cyclic problems

* Reporting in a single SPI message; no assembly of multiple SPI frames needed

* Limp-home output signal for activating application hardware in case system enters Fail-safe mode e.g. for switching on warning lights

* Fail-safe coded activation of Software development mode and Flash mode

* Unique SPI readable device type identification

* Software-initiated system reset

## Features