SN74AHCT74PWR
D触发器有预置和清除端
DESCRIPON
The ’AHCT74 dual positive-edge-triggered devices are D-type flip-flops.
A low level at the preset PRE or clear CLR inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive high, data at the data D input meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting the levels at the outputs.
FEATURES
• Inputs Are TTL-Voltage Compatible
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model A114-A
– 200-V Machine Model A115-A
– 1000-V Charged-Device Model C101
