SN74AHCT125PWR
TI(德州仪器)
电子元器件分类
具有三态输出翻两番总线缓冲器GATES QUADRUPLE BUS BUFFER GATES WITH 3-STATE OUTPUTS
The is a quadruple Bus Buffer Gate featuring independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable OE\ input is high. When OE\ is low, the respective gate passes the data from the A input to its Y output. To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pull-up resistor and the minimum value of the resistor is determined by the current-sinking capability of the driver.
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- Inputs are TTL-voltage compatible
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- Latch-up performance exceeds 250mA per JESD 17
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- Green product and no Sb/Br
