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SN74LVCZ161284AGR

SN74LVCZ161284AGR

TI(德州仪器) 主动器件

无差错POWER UP 19位IEEE STD 1284转换收发器 19-BIT IEEE STD 1284 TRANSLATION TRANSCEIVER WITH ERROR-FREE POWER UP

The SN74LVCZ161284A is designed for 3-V to 3.6-V VCC operation. This device provides asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.

This device has eight bidirectional bits; data can flow in the A-to-B direction when the direction-control input DIR is high, and in the B-to-A direction when DIR is low. This device also has five drivers that drive the cable side, and four receivers. The SN74LVCZ161284A has one receiver dedicated to the HOST LOGIC line and a driver to drive the PERI LOGIC line.

The output drive mode is determined by the high-drive HD control pin. When HD is high, the outputs are in a totem-pole configuration, and in an open-drain configuration when HD is low. This meets the drive requirements as specified in the IEEE Std 1284-I level-1 type and IEEE Std 1284-II level-2 type parallel peripheral-interface specifications. Except for HOST LOGIC IN and peripheral logic out PERI LOGIC OUT, all cable-side pins have a 1.4-k integrated pullup resistor. The pullup resistor is switched off if the associated output driver is in the low state or if the output voltage is above VCC CABLE. If VCC CABLE is off, PERI LOGIC OUT is set to low.

The device has two supply voltages. VCC is designed for 3-V to 3.6-V operation. VCC CABLE supplies the inputs and output buffers of the cable side only and is designed for 3-V to 3.6-V and for 4.7-V to 5.5-V operation. Even when VCC CABLE is 3 V to 3.6 V, the cable-side I/O pins are 5-V tolerant.

The Power-On Reset POR ensures that the Y outputs Y9–Y13 stay in the high state after power on until an associated input A9–A13 goes high. When an associated input goes high, all Y outputs are activated, and noninverting signals of the associated inputs are driven through Y outputs. This special feature prevents printer system errors caused by deasserting the BUSY signal in the cable at power on.

SN74LVCZ161284AGR中文资料参数规格
技术参数

电源电压DC 3.00V ~ 3.60V

输出电流 84 mA

供电电流 70 mA

位数 19

传送延迟时间 22.0 ns

电压波节 3.30 V

静态电流 70.0 mA

输入数 19

工作温度Max 70 ℃

工作温度Min 0 ℃

电源电压 3V ~ 3.6V

电源电压Max 3.6 V

电源电压Min 3 V

封装参数

安装方式 Surface Mount

引脚数 48

封装 TSSOP-48

外形尺寸

封装 TSSOP-48

物理参数

工作温度 0℃ ~ 70℃

其他

产品生命周期 Active

包装方式 Tape & Reel TR

符合标准

RoHS标准 RoHS Compliant

含铅标准 Lead Free

REACH SVHC版本 2015/06/15

海关信息

ECCN代码 EAR99

SN74LVCZ161284AGR引脚图与封装图
SN74LVCZ161284AGR引脚图

SN74LVCZ161284AGR引脚图

SN74LVCZ161284AGR封装图

SN74LVCZ161284AGR封装图

SN74LVCZ161284AGR封装焊盘图

SN74LVCZ161284AGR封装焊盘图

在线购买SN74LVCZ161284AGR
型号 制造商 描述 购买
SN74LVCZ161284AGR TI 德州仪器 无差错POWER UP 19位IEEE STD 1284转换收发器 19-BIT IEEE STD 1284 TRANSLATION TRANSCEIVER WITH ERROR-FREE POWER UP 搜索库存
替代型号SN74LVCZ161284AGR
图片 型号/品牌/封装 代替类型 描述 替代型号对比

型号: SN74LVCZ161284AGR

品牌: TI 德州仪器

封装: TSSOP 3V to 3.6V 48Pin

当前型号

无差错POWER UP 19位IEEE STD 1284转换收发器 19-BIT IEEE STD 1284 TRANSLATION TRANSCEIVER WITH ERROR-FREE POWER UP

当前型号

型号: SN74LVC161284DGGR

品牌: 德州仪器

封装: TSSOP 3.6V 48Pin

类似代替

19位总线接口 19-BIT BUS INTERFACE

SN74LVCZ161284AGR和SN74LVC161284DGGR的区别

型号: SN74LVCE161284DGGR

品牌: 德州仪器

封装: TSSOP-48 3V to 3.6V 48Pin

类似代替

无差错POWER UP 19位IEEE STD 1284转换收发器 19-BIT IEEE STD 1284 TRANSLATION TRANSCEIVER WITH ERROR-FREE POWER UP

SN74LVCZ161284AGR和SN74LVCE161284DGGR的区别

型号: 74LVCE161284DGGRE4

品牌: 德州仪器

封装: TSSOP 3V to 3.6V 48Pin

类似代替

无差错POWER UP 19位IEEE STD 1284转换收发器 19-BIT IEEE STD 1284 TRANSLATION TRANSCEIVER WITH ERROR-FREE POWER UP

SN74LVCZ161284AGR和74LVCE161284DGGRE4的区别