SN65LVDS150PWR

MuxIt -TM PLL倍频器 MuxIt-TM PLL FREQUENCY MULTIPLIER

description

The MuxIt is a family of general-purpose, multiple-chip building blocks for implementing parallel data serializers and deserializers. The system allows for wide parallel data to be transmitted through a reduced number of differential transmission lines over distances greater than can be achieved with a single-ended e.g., LVTTL or LVCMOS data interface. The number of bits multiplexed per transmission line is user selectable, allowing for higher transmission efficiencies than with other existing fixed ratio solutions. Muxlt utilizes the LVDS A/EIA-644 low voltage differential signaling technology for communications between the data source and data destination.

A Member of the MuxItSerializer Deserializer Building-Block Chip Family

Pin Selectable Frequency Multiplier Ratios Between 4 and 40

Input Clock Frequencies From 5 to 50 MHz

Multiplied Clock Frequencies up to 400 MHz

Internal Loop Filters and Low PLL-Jitter of 20 ps RMS Typical at 200 MHz

LVDS Compatible Differential Inputs and Outputs Meet or Exceed the Requirements of ANSI EIA/TIA-644-A

LVTTL Compatible Inputs Are 5 V Tolerant

LVDS Inputs and Outputs ESD Protection Exceeds 12 kV HBM

Operates From a Single 3.3 V Supply

Packaged in 28-Pin Thin Shrink Small-Outline Package With 26 mil Terminal Pitch