MC14099BCPG

ON SEMICONDUCTOR  MC14099BCPG  芯片, 4000系列 CMOS逻辑器件

The is a 8-bit Addressable Latch provides the data entered in serial form when the appropriate latch is addressed via address pins A0, A1, A2 and write disable is in the low state. For the MC14099B the input is a unidirectional write only port. The data is presented in parallel at the output of the eight latches independently of the state of write disable, write/read or chip enable. A master reset capability is available on both parts. It is capable of driving two low-power TTL loads or one low-power Schottky TTL load over the rated temperature range. This device contains protection circuitry to guard against damage due to high static voltages or electric fields.

.

Serial data input

.

Parallel output

.

Master reset

.

Pin for pin compatible with CD4099B

Precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit.