MC100EP32DR2G

3.3V / 5V ECL ± 2分频器 3.3V / 5V ECL ±2 Divider

The MC10/100EP32 is an integrated divide by 2 divider with differential CLK inputs. pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to V as a switching reference voltage. V may also rebias AC coupled inputs. When used, decouple V via a 0.01μF capacitor and limit current sourcing or sinking to 0.5mA. When not used, VThe reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the reset allows for the synchronization of multiple EP32"s in a system.The 100 Series contains temperature compensation.

Features

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350ps Typical Propagation Delay

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Maximum Frequency > 4 GHz Typical

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PECL Mode Operating Range: VCC= 3.0 V to 5.5 V

with VEE= 0 V

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NECL Mode Operating Range: VCC= 0 V

with VEE= –3.0 V to –5.5 V

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Open Input Default State

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Safety Clamp on Inputs

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Q Output will default LOW with inputs open or at VEE

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Pb-Free Packages are Available