LPC2364HBD100,551

NXP  LPC2364HBD100,551  微控制器, 32位, ARM7TDMI, 72 MHz, 128 KB, 34 KB, 100 引脚, LQFP

The is a 16-/32-bit Microcontroller based on ARM7TDMI-S core with RISC architecture operates at a maximum frequency of 72MHz. A 128-bit wide memory interface and an unique accelerator architecture enable 32-bit code execution at the maximum clock rate. For critical performance in interrupt service routines and DSP algorithms, this increases performance up to 30 % over Thumb mode. For critical code size applications, the alternative 16-bit Thumb mode reduces code by more than 30 % with minimal performance penalty. The device incorporates 128kB internal flash, 34kB internal RAM, 8-channel 10-bit A/D converter, 10-bit D/A converter, an Ethernet, four 32-bit timers and real-time clock RTC and 70 general-purpose I/O pins. This device also features peripherals like four UARTs, three inter-integrated circuit I2C, one serial peripheral interface SPI modules and one integrated interchip sound I2S.

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Dual Advanced high-performance bus AHB system

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Advanced vectored interrupt controller VIC

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General purpose DMA controller GPDMA

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Ethernet MAC with associated DMA controller

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USB 2.0 full-speed device with on-chip PHY and associated DMA controller

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CAN controller with two channels

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SD/MMC memory card interface

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70 General purpose I/O pins with configurable pull-up/down resistors

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PWM/timer block with support for three-phase motor control

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Real-time clock RTC with separate power pin

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2KB SRAM powered from the RTC power pin

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Watchdog timer WDT

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Standard ARM test/debug interface for compatibility with existing tools

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Emulation trace module supports real-time trace

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Four reduced power modes - Idle, sleep, power-down and deep power-down

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Processor wake-up from power-down mode via any interrupt able to operate during power-down mode

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Two independent power domains allow fine tuning of power consumption based on needed features

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Each peripheral has its own clock divider for further power saving

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Brownout detect with separate thresholds for interrupt and forced reset

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On-chip power-on reset