LM3S1751-IQC50-A2

M3核ARM处理器

* 32-bit ARM® Cortex™-M3 50-MHz processor core with System Timer SysTick, integrated Nested Vectored Interrupt Controller NVIC, Memory Protection Unit MPU, and Thumb-2 instruction set * Full-featured debug solution with debug access via JTAG and Serial Wire interfaces, and IEEE 1149.1-1990 compliant Test Access Port TAP controller * 128 KB single-cycle flash and 64 KB single-cycle SRAM * Lower-power battery-backed Hibernation module with Real-Time Clock * 21-56 GPIOs depending on configuration with programmable control for GPIO interrupts and pad configuration * ARM FiRM-compliant Watchdog Timer ; plus three General-Purpose Timer Modules GPTM, each of which provides two 16-bit timers/counters and can be configured to operate independently * 10-bit Analog-to-Digital Converter ADC with four analog input channels and a sample rate of 500 thousand samples/second * Three fully programmable 16C550-type UARTs with IrDA support * Two Synchronous Serial Interface SSI modules, supporting operation for Freescale SPI, MICROWIRE, or Texas Instruments synchronous serial interfaces * Inter-Integrated Circuit I2C Interface, providing Standard 100 Kbps and Fast 400 Kbps transmission and support for sending and receiving data as either a master or a slave * One integrated analog comparator configurable for output to initiate an ADC sample sequence, drive an output pin or generate an interrupt * Two PWM generator blocks, each with one 16-bit counter, two PWM comparators, a PWM signal generator, a dead-band generator, and an interrupt/ADC-trigger selector * Industrial and extended temperature RoHS-compliant 100-pin LQFP package and industrial-range RoHS-compliant 108-ball BGA package