GTL2005PW

4-BIT BI-DIREC NON-LATCH TRAN

Overview

The GTL2005 is a quad translating transceiver designed for 3.3 V system interface with a GTL/GTL+ bus.

The direction pin DIR allows the part to function as either a GTL-to-TTL sampling receiver or as a TTL-to-GTL interface.

The GTL2005 LVTTL interface is tolerant up to 5.5 V allowing direct access to TTL or 5 V CMOS outputs.

The GTL2005 Vref linearity degrades below 0.8 V see _Section 10.1_. If the application allows, use the GTL2014, otherwise more closely review noise margins.

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## Features

* Operates as a quad GTL/GTL+ sampling receiver or as a LVTTL/TTL to GTL/GTL+ driver

* Quad bidirectional bus interface

* 3.0 V to 3.6 V operation with 5 V tolerant LVTTL I/O

* Live insertion/extraction permitted

* Latch-up protection exceeds 500 mA per JESD78

* ESD protection exceeds 2000 V HBM per JESD22-A114, 150 V MM per JESD22-A115, and 1000 V CDM per JESD22-CC101

* Package offered: TSSOP14

## Features